Dominik Cirmirakis

Humidity-to-Frequency Sensor in CMOS Technology With Wireless Readout

A remotely powered microsystem for humidity measurement is presented. The core of the active transponder consists of a humidity-to-frequency chip fabricated in a standard complementary metal-oxide-semiconductor (CMOS) technology, which contains both the humidity sensor and the readout circuit. The sensor is constructed using the polyimide passivation layer and the top metal layer available in the technology used. Power and data transmissions, to and from the chip, respectively, use the same pair of inductively coupled coils with a 13.56 MHz carrier. The humidity readout is transmitted by load shift keying to the external circuit. The chip is fabricated with commercial 0.6-μm CMOS technology and occupies an area of 4.8 mm2. The sensors capacitance exhibited good linearity against relative humidity (RH) levels from 15% to 85%. The normalized sensitivity is 0.073% per %RH at 35°C. The circuit level calibration limited spread from process and mismatch variations to about 10%. The chip has a total power consumption of 1.39 mW. The device has two purposes; either as a stand-alone wireless humidity sensor or to evaluate the hermeticity of packages, such as in biomedical implants.

A fast passive phase shift keying modulator for inductively coupled implanted medical devices

This paper presents an integrated modulator for inductively coupled biomedical telemetry. The circuit implements passive phase shift keying (PPSK) modulation and is designed to work at 13.56 MHz with a single pair of coils for both data transmission and power delivery. The data link can reach data rates up to 1/16 of the carrier frequency, i.e., 847.5 kbps in this case. To our knowledge, it is the fastest data rate achieved by a single wireless link used simultaneously for power delivery and communication in implanted medical devices. The circuit was fabricated in a 0.6-μm CMOS technology, occupies a silicon area of 0.7 mm2 and dissipates about 2 mW from a 5 V power supply at full speed of operation.

A Vestibular Prosthesis With Highly-Isolated Parallel Multichannel Stimulation

This paper presents an implantable vestibular stimulation system capable of providing high flexibility independent parallel stimulation to the semicircular canals in the inner ear for restoring three-dimensional sensation of head movements. To minimize channel interaction during parallel stimulation, the system is implemented with a power isolation method for crosstalk reduction. Experimental results demonstrate that, with this method, electrodes for different stimulation channels located in close proximity ( mm) can deliver current pulses simultaneously with minimum inter-channel crosstalk. The design features a memory-based scheme that manages stimulation to the three canals in parallel. A vestibular evoked potential (VEP) recording unit is included for closed-loop adaptive stimulation control. The main components of the prototype vestibular prosthesis are three ASICs, all implemented in a 0.6- μm high-voltage CMOS technology. The measured performance was verified using vestibular electrodes in vitro.

An implantable 3-D vestibular stimulator with neural recording

This paper presents an implantable vestibular stimulator for restoring three-dimensional (3-D) balance sensation. Advanced stimulation management is used to control independent parallel stimulation on the three semicircular canals. A switched-capacitor technique is implemented to allow stimulation on the three canals with minimized crosstalk. Realtime neural recording function is also included in the design. The stimulator was fabricated in a 0.6-μm HV CMOS technology. Measured results are presented to demonstrate the operation of the circuit.

An implantable humidity-to-frequency sensor in CMOS technology

This paper reports the development of a thin-film humidity sensor which is integrated as part of a standard CMOS chip. The sensor element is fabricated using the topmost polyimide layer and the top metal layer available in standard CMOS processes. The sensor has been made part of an integrated wireless device which converts its capacitance to an output frequency. Power transmission to, and data transmission from the device, use the same pair of inductively coupled coils. The humidity readout is transmitted by load shift keying. The chip was fabricated in a 0.6-µm CMOS technology and occupies an area of 4.8 mm2. The sensors capacitance exhibits good linearity against relative humidity (RH) levels from 15–85%. The normalized sensitivity is 0.073% per %RH at 37 °C. Power consumption is 1.19 mW. The device has two purposes: it can be a stand-alone wireless humidity sensor (the first wireless humidity sensor in standard CMOS technology reported to date) and it can be employed for evaluating the hermeticity of implantable biomedical micropackages.

Design of a stimulator ASIC for an implantable vestibular neural prosthesis

This paper presents the design of a multichannel stimulator ASIC for an implantable neural prosthesis to restore 3-D vestibular sensation. The stimulator can provide the three semicircular canals with biphasic current pulses at rates between 1 and 500 pps with current amplitudes up to 1 mA. The ASIC was implemented in 0.6 μm HV CMOS technology and post-layout simulations are presented.

A telemetry operated vestibular prosthesis

A telemetry operated vestibular prosthesis has been developed. The telemetry is designed to provide power to the implantable circuits and maintain bi-directional communication in a packet-based manner. It uses only one pair of inductively coupled coils. Preliminary measurements are shown, including in-vitro operation of the stimulation and recording functions. For a 10 MHz carrier frequency and a 7 mm distance between the coils, the downlink and uplink data streams operate at 400 kbps and 600 kbps, respectively.

An Implantable Closed-Loop Vestibular Prosthesis

This paper presents an implantable closed-loop vestibular prosthesis for restoring three-dimensional (3-D) balance sensation. The prosthesis consists of an external part and an implantable part. The external part collects the head motion and controls the stimulation from the implantable part accordingly. In the implantable part, advanced stimulation management is used to control independent parallel stimulation on the three semicircular canals. Real-time neural recording function is also included in the design. The implantable part includes three ASICs, which were fabricated in a 0.6-μm HV CMOS technology. Measured results are presented to demonstrate the operation of the circuit.

Comparision of methods for interference neutralisation in tripolar nerve recording cuffs

The aim of this paper is to compare three recording methods for interference rejection from tripolar nerve cuffs by testing in a saline-filled tank. The three methods were: the quasi-tripole (QT), the modified-quasi-tripole (mQT) and adjusted true tripole (aTT). When the interfering electric field that surrounds the cuff is solonoidal and coaxial with the cuff, the mQT allows the interference that happens to be present due to asymmetry to be neutralized at one frequency, and reduced across the ENG band. The aTT is better in this situation, allowing almost complete neutralization at all frequencies. However, when the electric field is altered after adjustment, the interference was greater for the aTT than the mQT. In an implant, the interference is likely to come from nearby muscles and the fields will be continuously changing as the action potentials propagate. Therefore, it is likely that mQT will be better than the aTT.