Dong Zhi Chi

New salicidation technology with Ni(Pt) alloy for MOSFETs

A novel salicide technology to improve the thermal stability of the conventional Ni silicide has been developed by employing Ni(Pt) alloy salicidation. This technique provides an effective avenue to overcome the low thermal budget (<700/spl deg/C) of the conventional Ni salicidation by forming Ni(Pt)Si. The addition of Pt has enhanced the thermal stability of NiSi. Improved sheet resistance of the salicided narrow poly-Si and active lines was achieved up to 750/spl deg/C and 700/spl deg/C for as-deposited Ni(Pt) thickness of 30 nm and 15 nm, respectively. This successfully extends the rapid thermal processing (RTP) window by delaying the nucleation of NiSi/sub 2/ and agglomeration. Implementation of Ni(Pt) alloyed silicidation was demonstrated on PMOSFETs with high drive current and low junction leakage.

Comparative study of current–voltage characteristics of Ni and Ni(Pt)-alloy silicided p+/n diodes

A comparative study of the I–V characteristics of p+/n diodes silicided with a pure Ni and Ni(Pt) alloy has been performed. Higher saturation currents as well as abnormal reverse I–V characteristics were observed for some of the diodes which were silicided with pure Ni at 700u200a°C while good I–V characteristics were observed for other diodes. Our results show that the forward current in the diodes with good I–V characteristics is dominated by electron diffusion in the p+ region. For diodes with higher saturation currents, it has been concluded that both forward and reverse currents in these diodes are dominated by the current following through Schottky contacts that are formed due to inadvertent penetration of NiSi spikes through the p+ region into n region. The formation of Schottky contact was not observed in diodes silicided with a Ni(Pt) alloy, providing a clear evidence of enhanced thermal stability of Pt containing NiSi.

Grain-boundary grooving and agglomeration of alloy thin films with a slow-diffusing species

We present a general phase-field model for grain-boundary grooving and agglomeration of polycrystalline alloy thin films. In particular, we study the effects of slow-diffusing species on the grooving rate. As the groove grows, the slow species becomes concentrated near the groove tip so that further grooving is limited by the rate at which it diffuses away from the tip. At early times the dominant diffusion path is along the boundary, while at late times it is parallel to the substrate. This change in path strongly affects the time dependence of grain-boundary grooving and increases the time to agglomeration. The present model provides a tool for agglomeration-resistant thin film alloy design.

Pyramidal structural defects in erbium silicide thin films

Pyramidal structural defects, 5–8μm wide, have been discovered in thin films of epitaxial ErSi2−x formed by annealing thin Er films on Si(001) substrates at temperatures of 500–800°C. The formation of these defects is not due to oxidation. We propose that they form as a result of the separation of the silicide film from the substrate and its buckling in order to relieve the compressive, biaxial epitaxial stresses. Silicon can then diffuse through the silicide or along the interface to fully or partially fill the void between the buckled erbium disilicide film and the substrate.

Demonstration of Schottky Barrier NMOS Transistors With Erbium Silicided Source/Drain and Silicon Nanowire Channel

We have fabricated silicon nanowire N-MOSFETs using erbium disilicide (ErSi2-x) in a Schottky source/drain back-gated architecture. Although the subthreshold swing (~180 mV/dec) and drain-induced barrier lowering (~500 mV/V) are high due thick BOX as gate oxide, the fabricated Schottky transistors show acceptable drive current ~900 muA/mum and high Ion/Ioff ratio (~105). This is attributed to the improved carrier injection as a result of low Schottky barrier height (Phib) of ErSi2-x/n - Si(~0.3 eV) and the nanometer-sized (~8 nm) Schottky junction. The carrier transport is found to be dominated by the metal-semiconductor interface instead of the channel body speculated from the channel length independent behavior of the devices. Furthermore, the transistors exhibit ambipolar characteristics, which are modeled using thermionic/thermionic-field emission for positive and thermionic-field emission for negative gate biases.

Nickel-Silicided Schottky Junction CMOS Transistors With Gate-All-Around Nanowire Channels

We demonstrate high-performance Schottky CMOS transistors with NiSi source/drain and gate-all-around (GAA) silicon nanowire (~5 nm) channels. The transistors exhibit good I on/I off characteristics, along with fully controlled shortchannel effects revealed by low drain-induced barrier lowering (~10 mV/V) and near-ideal subthreshold swing (~60 mV/dec). Although the N-MOSFET required dopant segregation to suppress the ambipolar behavior, excellent P-MOSFET characteristics could be achieved without the use of barrier modification techniques. We attribute this to the Schottky barrier thinning in a nanosized metal-semiconductor junction and superior gate electrostatic control in a GAA nanowire architecture.

Phase-field model for grain boundary grooving in multi-component thin films

Polycrystalline thin films can be unstable with respect to island formation (agglomeration) through grooving where grain boundaries intersect the free surface and/or thin film–substrate interface. We develop a phase-field model to study the evolution of the phases, composition, microstructure and morphology of such thin films. The phase-field model is quite general, describing compounds and solid solution alloys with sufficient freedom to choose solubilities, grain boundary and interface energies and heats of segregation to all interfaces. We present analytical results which describe the interface profiles, with and without segregation, and confirm them using in numerical simulations. We demonstrate that the present model accurately reproduces theoretical grain boundary groove angles both at and far from equilibrium. As an example, we apply the phase-field model to the special case of a Ni(Pt)Si (nickel/platinum silicide) thin film on an initially flat silicon substrate.

Improved electrical performance of erbium silicide Schottky diodes formed by Pre-RTA amorphization of Si

Erbium silicide Schottky diodes formed on Si(001) substrate using rapid thermal annealing method show degraded Schottky-barrier height /spl phi//sub Beff/ and ideality factor n due to the presence of silicide-induced microstructural defects which are likely sources of trap states. A method to improve the /spl phi//sub Beff/ and n of the diodes utilizing in situ Ar plasma cleaning to induce a light amorphization of the Si(001) substrate is proposed. Even though the diodes formed in this way are less textured and have a poorer interface, they are free of silicide-induced microstructural defects, leading to an overall improvement in current transport and conduction properties which can be modeled using inhomogenous Schottky contact model.

On the Morphological Changes of Ni- and Ni(Pt)-Silicides

The issue of agglomeration and layer inversion has remained critical because conductivity of thin silicide films is sensitive to the degradation of the film morphology. The purpose of this work is to study the morphology degradation that includes agglomeration and layer inversion of NiSi and Ni(Pt)Si. Agglomeration was observed to be preceded by holes evolution. It was found that the addition of Pt has led to improvement in the agglomeration behavior of NiSi but have little influence on the layer inversion when the amount of Pt is 5 atom % in Ni(Pt) on the undoped poly-Si. Increasing the Pt concentration to about 10% shows improvement in the layer inversion behavior compared to 5% Pt. The agglomeration behavior and layer inversion with the addition of the Pt are discussed in terms of the controlling factors of grain boundary energy, interface energies, and nature of the silicide formed. The improved agglomeration associated with Pt addition is attributed to a lower interfacial energy leading to lower grain boundary mobility and reduced driving force for hole evolutions. In addition, suppression of layer inversion can be attained by silicidation with the use of thin Ni(Pt) (∼10 nm).

Effect of Ion Implantation on Layer Inversion of Ni Silicided Poly-Si

The effect of ion implantation on the behavior and extent of layer inversion in Ni-silicided poly-Si was investigated. Two different implantation species, namely, BF + 2 and N + 2 , which affect the poly-Si grain growth were used. Retarded layer inversion was found with the ion-implanted poly-Si substrates. However, the formation of NiSi 2 takes place at 700°C, which is slightly lower than that on Si(100). The easy nucleation of NiSi 2 on poly-Si is implicitly related to the morphology perturbation.