Dung Ching Perng

1-nm-thick graphene tri-layer as the ultimate copper diffusion barrier

We demonstrate the thinnest ever reported Cu diffusion barrier, a 1-nm-thick graphene tri-layer. X-ray diffraction patterns and Raman spectra show that the graphene is thermally stable at up to 750 °C against Cu diffusion. Transmission electron microscopy images show that there was no inter-diffusion in the Cu/graphene/Si structure. Raman analyses indicate that the graphene may have degraded into a nanocrystalline structure at 750 °C. At 800 °C, the perfect carbon structure was damaged, and thus the barrier failed. The results of this study suggest that graphene could be the ultimate Cu interconnect diffusion barrier.

Sub-centimeter micromachined electron microscope

A new approach for fabricating macroscopic (∼10×10×10 mm3) structures with micrometer accuracy has been developed. This approach combines the precision of semiconductor processing and fiber optic technologies. A (100) silicon wafer is anisotropically etched to create four orthogonal v‐grooves and an aperture on each 10×12 mm die. Precision 308 μm optical fibers are sandwiched between the die to align the v‐grooves. The fiber is then anodically bonded to the die above and below it. This procedure is repeated to create thick structures and a stack of 5 or 6 die will be used to create a miniature scanning electron microscope (MSEM). Two die in the structure will have a segmented electrode to deflect the beam and correct for astigmatism. The entire structure is ultrahigh vacuum compatible. The performance of a SEM improves as its length is reduced and a sub‐cm 2 keV MSEM with a field emission source should have approximately 1 nm resolution. A low‐voltage high‐resolution MSEM would be useful for the examination of biological specimens and semiconductors with a minimum of damage. The first MSEM will be tested with existing 6 μm thermionic sources. In the future a micromachined field emission source will be used. The stacking technology presented in this paper can produce an array of MSEMs 1–30 mm in length with a 1 mm or larger period. A key question being addressed by this research is the optimum size for a low‐voltage MSEM which will be determined by the required spatial resolution, field of view, and working distance.

Near-infrared photodetector with CuIn1−x AlxSe2 thin film

Application of the CuInSe2-based thin film for a near-infrared (NIR) photodetector (PD) has been demonstrated. The Cu(In,Al)Se2 (CIAS) was used as an absorption layer for NIR PD with comb-structured Al electrodes. X-ray diffraction spectrum and scanning electron microscope (SEM) micrographs show that the CIAS film is a single phased polycrystalline film with smooth surface and super large (2–5 μm) grains. Low temperature photoluminescence analysis indicates that the CIAS has a strong NIR excitation emission peak. The CIAS PDs are highly sensitive to the NIR spectrum with cut-off frequency near 790 nm and demonstrate four-orders of magnitude in photocurrent amplification.

Amorphous RuW Film as a Diffusion Barrier for Advanced Cu Metallization

Barrier properties of 10 nm thick Ru and amorphous Ru 37.2 W 62.8 films as seedless copper diffusion barriers have been investigated. Thermal stability of the barriers was evaluated after annealing at various temperatures. X-ray diffraction (XRD) analyses and sheet resistance measurements suggested that the Ru 37.2 W 62.8 barrier was thermally stable up to 700°C against Cu diffusion, which improved about 150°C over the Ru film. XRD studies and electron diffraction patterns of the Ru 37.2 W 62.8 film showed that it maintained an amorphous-like microstructure after 30 min annealing at 550°C. This film started to recrystallize at about 600°C and developed to a film with Ru and W0 3 grains after a 700°C anneal. The leakage current of the 500°C postannealed Cu/RuW/ porous SiOCH/Si stacked structure provided nearly 2 orders of magnitude superior than that of the Ru sample. The amorphous Ru 37.2 W 62.8 film is an alternative candidate for the Cu direct platable seedless barrier in the advanced copper metallization process.

Micromachined electrostatic electron source

A microfabrication technique has been developed that combines the precision of silicon micromachining and fiber optics to allow the construction of large three‐dimensional structures with dimensional tolerances approaching 1 μm [A. D. Feinerman, S. E. Shoaf, and D. A. Crewe, Proceedings of the 180th Annual ECS Conference, Phoenix, AZ, October 1991 (unpublished)]. A miniature scanning electron microscope (MSEM) is being designed using this method. In this article we will present the electron optic calculations of a simple 1 kV MSEM consisting of a source, a three element electrostatic lens, deflectors, and a detector. The MSEM measures less than one cubic centimeter. There are many advantages of a MSEM. The performance of a SEM is improved as its length is reduced. [T. H. P. Chang, D. P. Kern, and L. P. Murray, J. Vac. Sci. Technol. B 8, 1698 (1990)]. The need for mechanical adjustments and motion feedthroughs is eliminated since the microscope components are prealigned to the optic axis. All components ar...

High-performance ultraviolet detection and visible-blind photodetector based on Cu2O/ZnO nanorods with poly-(N-vinylcarbazole) intermediate layer

This study reports a high-performance hybrid ultraviolet (UV) photodetector with visible-blind sensitivity fabricated by inserting a poly-(N-vinylcarbazole) (PVK) intermediate layer between low-cost processed Cu2O film and ZnO nanorods (NRs). The PVK layer acts as an electron-blocking/hole-transporting layer between the n-ZnO and p-Cu2O films. The Cu2O/PVK/ZnO NR photodetector exhibited a responsivity of 13.28 A/W at 360 nm, a high detectivity of 1.03 × 1013 Jones at a low bias of −0.1 V under a low UV light intensity of 24.9 μW/cm2. The photo-to-dark current ratios of the photodetector with and without the PVK intermediate layer at a bias of −0.5 V are 1.34 × 102 and 3.99, respectively. The UV-to-visible rejection ratios (R360 nm/R450 nm) are 350 and 1.735, respectively. Several features are demonstrated: (a) UV photo-generated holes at the ZnO NRs can effectively be transported through the PVK layer to the p-Cu2O layer; (b) the insertion of a PVK buffer layer significantly minimizes the reverse-bias lea...

Microstructural, electrical, and mechanical properties of graphene films on flexible substrate determined by cyclic bending test

Three kinds of graphene/polyimide specimen were prepared via transfer with 3, 6, and 9 graphene layers, respectively. A self-designed bending tester was applied to carry out cyclic bending tests with various bending cycles and bending frequencies. The variations of electrical resistance of the specimens during the bending process and the rate of increase of electrical resistance with the number of bending cycles and bending frequency for various total graphene thicknesses were determined. The voids that form at the interfaces between any two adjacent layers increase in size, leading to a disconnection between graphene layers after a number of bending cycles. A reduction in the graphene thickness and increases in the number of bending cycles and bending frequency increase the rate of increase of electrical resistance. For specimens with a given graphene thickness, the ID/IG value of the Raman shift increases exponentially with increasing number of bending cycles and bending frequency. An increase in ID/IG is accompanied by increases in both the rate of increase of electrical resistance and the aspect ratio L1/L2 (where L1 and L2 are the half lengths of the long and short axes, respectively, of the selected-area electron diffraction pattern of graphene). The tilt angle formed in the top graphene layer of the specimen after bending tests increases with increasing graphene thickness for a given bending frequency. The rate of increase of the tilt angle is affected by the bending frequency.

A 3 nm self-forming InOx diffusion barrier for advanced Cu/porous low-k interconnects

The copper diffusion barrier properties of a 3 nm self-forming InOx layer on a porous ultralow-k (p-ULK) film have been investigated. A 5 at. % In doped Cu film was directly deposited onto porous low-k films by co-sputtering, followed by annealing at various temperatures. Transmission electron microscopy (TEM) images showed that a 3 nm layer was self-formed at the interface between Cu–In and p-ULK films after annealing at 400 °C for 1 h. An EDS line scan on the region near this interface showed obvious accumulation of In at the interface. X-ray photoelectron spectroscopy (XPS) analyses indicated that the self-formed interfacial layer was InOx. The self-forming InOx layer prevented Cu agglomeration on the p-ULK film surface. The XPS atomic depth profiles showed that the self-formed InOx barrier was thermally stable against Cu diffusion to at least 500 °C for 5 h. The sheet resistance of the post 500 °C annealed Cu–In film was comparable to that of a pure Cu film. The Cu–In self-forming barrier approach may be a viable candidate for Cu/p-ULK interconnects.

Non-vacuum growth of graphene films using solid carbon source

This study demonstrates that air annealing can grow high-quality graphene films on the surface of polycrystalline nickel film with the help of an effective SiO2 capping layer. The number of graphene layers can be modulated by the amount of carbon embedded in the Ni film before annealing. Raman analysis results, transmission electron microscopy images, and electron diffraction patterns of the samples confirm that graphene films can be grown in air with an oxygen blocking layer and a 10 °C/s cooling rate in an open-vented rapid thermal annealing chamber or an open tube furnace. The high-quality low-defect air-annealing grown graphene is comparable to commercially available graphene grown via chemical vapor deposition. The proposed graphene growth using air annealing technique is simple and low-cost, making it highly attractive for mass production. It is transfer-free to a silicon substrate and can speed up graphene development, opening up new applications.

The TDDB failure mode and its engineering study for 45nm and beyond in porous low k dielectrics direct polish scheme

To keep pursuing the chip resistance capacitance (RC) delay improvement, it is necessary to further reduce k value. Accordingly, direct polished porous type ultra-low-k (ULK) film instead of non-porous low-k materials is integrated into Cu interconnects from 45 nm. However, because of the ULK characteristics and the minimized feature size, the time-to-break-down (TDDB) failure mode behaves different from silica glass or nonporous low-k film. And it is not only sensitive to geometries but also very sensitive to the engineering in the fabrication process. In this paper, we identified three TDDB failure modes, Cu protrusion from trench top interface, sidewall, and bottom corner, in the direct polished ULK scheme. In addition, on the basis of those failure modes, the related mechanisms in conjunction with the sensitivity to the processes are reported as well.