E. Quinones

Cold-Wall Ultrahigh-Vacuum Chemical-Vapor-Deposition of Doped and Undoped Si and Si1-xGex Epitaxial-Films Using SiH4 and Si2H6

Doped and undoped silicon homoepitaxy and Si1−xGex‐on‐Si heteroepitaxy have been achieved by cold‐wall ultrahigh vacuum chemical vapor deposition using disilane (Si2H6), silane (SiH4), digermane (Ge2H6), and germane (GeH4) as the reactant gases. Boron and phosphorus doping were achieved by flowing B2H6 and PH3 dopant gases, respectively, into the reactor. The growth mechanism and film quality of intrinsic Si, B/P‐doped films, and Si1−xGex alloys using SiH4 and Si2H6 are comparatively studied in this article. The crystallinity of the films was examined by Nomarski microscopy after Schimmel etching, transmission electron microscopy (TEM), and in situ reflection high energy electron diffraction (RHEED). The defect density of the intrinsic Si films grown by Si2H6 and SiH4 was found to be below the TEM detection limit (105/cm2). B‐doped and P‐doped single‐crystal Si were deposited using Si2H6 or SiH4 with a partial pressure of 10 mTorr at substrate temperatures from 550 to 600 °C. The B‐ and P‐doping concentra...

Heterostructure P-channel metal–oxide–semiconductor transistor utilizing a Si1−x−yGexCy channel

The dc characteristics of Si1−x−yGexCy P-channel metal–oxide–semiconductor field-effect transistors (PMOSFETs) were evaluated between room temperature and 77 K and were compared to those of Si and Si1−xGex PMOSFETs. The low-field effective mobility in Si1−x−yGexCy devices is found to be higher than that of Si1−xGex (grown in the metastable regime) and Si devices at low gate bias and room temperature. However, with increasing transverse fields and with decreasing temperatures, Si1−x−yGexCy devices show degraded performance. The enhancement at low gate bias is attributed to the strain stabilization effect of C. This application of Si1−x−yGexCy in PMOSFETs demonstrates potential benefits in the use of C for strain stabilization of the binary alloy.

Design, fabrication, and analysis of SiGeC heterojunction PMOSFETs

We present the evaluation of the strain-stabilizing capabilities of C in the Si/sub 1-x/Ge/sub x/ system. To demonstrate these effects, we have designed Si/sub 1-x-y/Ge/sub x/C/sub y/ heterojunction PMOSFET devices over a range of Ge concentrations, with thicknesses that would typically result in related or metastable films under normal processing conditions. The dc characteristics of Si/sub 1-x-y/Ge/sub x/C/sub y/, SiCe, and Si PMOSFETs (L=10 /spl mu/m) were evaluated at room temperature and at 77 K. In general, the saturation mobility in Si/sub 1-x-y/Ge/sub x/C/sub y/ devices is higher than that of Si/sub 1-x/Ge/sub x/ and Si devices at low gate bias and room temperature. This enhancement is attributed to the strain stabilization effect of C. With proper optimization of Ge and C concentrations, it is possible to fabricate devices with significant improvements in drive current under normal operating conditions (0-3 V, 300 K). This application of Si/sub 1-x-y/Ge/sub x/C/sub y/ in PMOSFETs demonstrates the potential benefits of using of C in the Column IV heterostructure system.

Simulation and optimization of strained Si1−xGex buried channel p-MOSFETs

Abstract Deep submicron (0.35 μm) strained Si1−xGex buried channel p-MOSFETs with a Ge concentration up to 50% were simulated using the MEDICI device simulator. A buried channel structure offers several benefits over a surface channel structure without a Si cap. Simulation results show that the maximum drain current increases monotonically with the Ge mole fraction. The drive current enhancement is more than 300% for Si0.5 Ge0.5 over Si. Subthreshold characteristics were analyzed for different Ge mole fractions in this study. The effects of Si cap layer thickness and Si1−xGex channel thickness on drive current and gate voltage operating window were analyzed. The simulation results show that the drive current is the highest when the Si1−xGex layer thickness is between 100 and 300 A and that Si1−xGex layer thickness can be as low as 50 A with less than 10% penalty in the drive current, for structures with a 50 A Si cap layer.

Strained Si n-channel metal–oxide–semiconductor transistor on relaxed Si1−xGex formed by ion implantation of Ge

Ge implantation followed by high-temperature solid phase epitaxy was used to form a relaxed substrate, eliminating need for the growth of relaxed Si1−xGex layers. Upon this film, a 2000 A buffer layer of Si0.85Ge0.15 followed by a 200 A strained Si layer was grown by ultrahigh-vacuum chemical vapor deposition. For comparison, unstrained Si epitaxial films and a 2000 A thick film of Si0.85Ge0.15 (on unimplanted Si) followed by 200 A of Si were used. n-channel metal–oxide–semiconductor transistors were fabricated and their dc characteristics were examined. Strained Si devices show a 17.5% higher peak linear μFE than control devices as a result of higher electron mobility in the strained Si channel. This work demonstrates a simple method for the formation of strained Si layers.

Properties of Si1-x-yGexCy Epitaxial Films Grown by Ultrahigh Vacuum Chemical Vapor Deposition

We have studied the deposition of Si 1-x-y Ge x C y epitaxial films using ultrahigh vacuum chemical vapor deposition at temperatures from 475 to 600°C. The growth rate is found to decrease substantially with the addition of methylsilane. Incorporation of C, as measured by secondary ion mass spectroscopy (SIMS ), is found to increase linearly with flow for low C concentration (∼2%) but the dependence becomes sublinear at higher CH 3 SiH 3 flow rates. The substitutional incorporation of C, determined using X-ray diffraction is found to increase with decreasing temperature. For the films studied here we find substitutional incorporation up to 1.8% in Si 1-y C y films This is for a total incorporation of 2.5%, as measured by SIMS. Complete substitutional incorporation of C is obtained for up to 1.2%. For Si 1-x-y Ge x C y films, we find that the amount of substitutional C that can be incorporated decreases with increasing temperature. At 550°C we find a maximum of 0.7% C can be incorporated substitutionally, whereas at 475°C we are able to incorporate higher concentrations, similar to that for Si 1-y C y layers. Morphology studies also indicate that lower growth temperatures are preferable in the growth of Si 1-y C y films.

Surface Morphology of Si 1−x−y Ge x C y Epitaxial Films Deposited by Low Temperature UHV-CVD

Si 1−x−y Ge x C y epitaxial films offer wider control of strain and bandgap. In such films the morphology is an important indication of the crystalline quality of the material. We report on the morphology of Si 1−x−y Ge x C y epitaxial thin films deposited by Ultra High Vacuum Chemical Vapor Deposition at a temperature of 550° C and deposition pressures ranging from 1 to 10 mTorr. The precursors used were Si 2 H 6 , GeH 4 and CH 3 SiH 3 . Germanium mole fractions ranging from 0% to 40% were studied with carbon concentrations varying from 2×10 19 to 2×10 21 atoms/cm 3 . AFM analysis of the surface indicates that the roughness is a function of both the carbon concentration and the film thickness. For high germanium concentrations with thickness beyond the critical thickness (of Si 1−x Ge x ), carbon is found to decrease the surface roughness of the film. Thus the surface morphology confirms the strain compensation provided by carbon which is also observed using XRD. For films below the critical thickness, as the carbon concentration is increased, three dimensional islanding is observed by RHEED and AFM, degrading the epitaxial quality of the material.

Enhanced hole mobilities in tensile-strained Si/sub 1-y/C/sub y/ alloy PMOSFETs

The incorporation of C in Si epitaxial layers can used as an alternative method to deposit tensile-strained Si layers directly on a silicon substrate, for obtaining improved hole transport behavior in the valence band. The proposed method to produce tensile-strained layers is attractive because it eliminates the need to deposit a thick relaxed SiGe buffer layer. Additionally, the elimination of this relaxed buffer layer alloys the concern over dislocations and other defects propagating to the channel region. The fabrication and transport properties of PMOSFETs utilizing a strained-engineered Si/sub 1-y/C/sub y/ channel are reported for the first time in this paper.