E. Vernon

ASIC With Multiple Energy Discrimination for High-Rate Photon Counting Applications

An ASIC for high rate photon counting measurements with multiple energy discrimination is presented. Optimized for pixelated CdZnTe sensors, the ASIC is composed of 64 channels with low-noise charge preamplification, high-order shaping (40 ns minimum peaking time), and five window-discriminators with associated 16-bit counters. An efficient readout scheme allows simultaneous measurement and readout through a 60 MHz 16-bit output bus. The ASIC architecture and experimental results are reported, and the impact of the shaper order on the resolution, ballistic deficit, and pile-up is discussed

Characterization of the H3D ASIC Readout System and 6.0 cm

Two 20 mm × 20 mm × 15 mm pixelated CZT detectors made by eV-Products were characterized using the new H3D Application Specific Integrated Circuits (ASIC) readout system developed by the Instrumentation Division at Brookhaven National Laboratory. The ASIC is capable of reading out energy and timing signals from 121 anode pixels and the planar cathode electrode of one CZT detector simultaneously. The system has a measured electronic noise of ~2.2 keV FWHM with a dynamic range from 20 keV to 3.0 MeV. The two detectors achieved energy resolution of 0.48% FWHM and 0.60% FWHM, respectively, at 662 keV for single-pixel events from the entire 6.0 cm3 detection volume at room temperature with an un-collimated 137Cs source. The average (μτ)e of both detectors were measured to be >; 10-2 cm 2/V. The detection efficiency of the two detectors was evaluated at several different energies up to 1.3 MeV by comparing with simulated data. It was found that the total counts agree well between the measured data and the simulated data over the studied energy range. However, the measured photopeak counts were 10-15% lower than simulated photopeak counts at high gamma-ray energies. The analysis shows that the loss of photopeak efficiency is likely due to the charge loss from peripheral pixels to the boundary of detectors.

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We present VMM1, the first prototype of a family of front-end ASICs designed for the ATLAS muon upgrade. The ASIC will operate with MICROMEGAS and TGC detectors, providing charge and timing measurements along with other features including sub-hysteresis discrimination, address of the first event in real time, and digital output per channel for Time-over-Threshold measurements. The shaper, designed via the concept of Delayed Dissipative Feedback (DDF), supports analog dynamic ranges in excess of 10 \thinspace000. With a capacitance of 200 pF and a nominal peaking time of 25 ns, the ASIC offers resolution of charge and timing better than 1 fC and 1 ns, respectively, for input charges up to 2 pC. Designed in a commercial 130 nm technology it dissipates about 4.5 mW per channel.

3-D Position Sensitive CdZnTe Detectors

We present an application-specific integrated circuit (ASIC) for high-resolution x-ray spectrometers (XRS). The ASIC reads out signals from pixelated silicon drift detectors (SDDs). The pixel does not have an integrated field effect transistor (FET); rather, readout is accomplished by wire-bonding the anodes to the inputs of the ASIC. The ASIC dissipates 32 mW, and offers 16 channels of low-noise charge amplification, high-order shaping with baseline stabilization, discrimination, a novel pile-up rejector, and peak detection with an analog memory. The readout is sparse and based on custom low-power tristatable low-voltage differential signaling (LPT-LVDS). A unit of 64 SDD pixels, read out by four ASICs, covers an area of 12.8 cm2 and dissipates with the sensor biased about 15 mW/cm2. As a tile-based system, the 64-pixel units cover a large detection area. Our preliminary measurements at -44°C show a FWHM of 145 eV at the 5.9 keV peak of a 55Fe source, and less than 80 eV on a test-pulse line at 200 eV.

VMM1—An ASIC for Micropattern Detectors

The peak detector derandomizer ASIC provides threshold discrimination, arbitration, peak and timing detection with analog memory, sparsification, and multiplexing for 32 input channels of analog pulse data. In this work the ASIC is characterized for high-rate operation. A new version of the ASIC, can process multiple events occurring at the same time and provides time-over-threshold measurement for pile up rejection.

ASIC for SDD-Based X-Ray Spectrometers

We describe a front-end application specific integrated circuit (ASIC) developed for a silicon Compton telescope. Composed of 32 channels, it reads out signals in both polarities from each side of a Silicon strip sensor, 2 mm thick 27 cm long, characterized by a strip capacitance of 30 pF. Each front-end channel provides low-noise charge amplification, shaping with a stabilized baseline, discrimination, and peak detection with an analog memory. The channels can process events simultaneously, and the read out is sparsified. The charge amplifier makes uses a dual-cascode configuration and dual-polarity adaptive reset. The low-hysteresis discriminator and the multi-phase peak detector process signals with a dynamic range in excess of four hundred. An equivalent noise charge (ENC) below 200 electrons was measured at 30 pF, with a slope of about 4.5 electrons / pF at a peaking time of 4 mus. With a total dissipated power of 5 mW the channel covers an energy range up to 3.2 MeV.

The PDD ASIC: highly efficient energy and timing extraction for high-rate applications

We present an application specific integrated circuit (ASIC) for high-resolution X-ray spectrometers. The ASIC is designed to read out signals from a pixelated silicon drift detector (SDD). Each hexagonal pixel has an area of 15 mm2 and an anode capacitance of less than 100 fF. There is no integrated Field Effect transistor (FET) in the pixel, rather, the readout is done by wire-bonding the anodes to the inputs of the ASIC. The ASIC provides 14 channels of low-noise charge amplification, high-order shaping with baseline stabilization, and peak detection with analog memory. The readout is sparse and based on low voltage differential signaling. An interposer provides all the interconnections required to bias and operate the system. The channel dissipates 1.6 mW. The complete 14-pixel unit covers an area of 210 mm2, dissipates 12 mW cm-2, and can be tiled to cover an arbitrarily large detection area. We measured a preliminary resolution of 172 eV at -35 degC on the 6 keV peak of a 55Fe source.

Front-End ASIC for a Silicon Compton Telescope

CdZnTe (CZT) is a promising medium for room-temperature gamma-ray detectors. However, the low production yield of acceptable quality crystals hampers the use of CZT detectors for gamma-ray spectroscopy. Significant efforts have been directed towards improving quality of CZT crystals to make them generally available for radiation detectors. Another way to address this problem is to implement detector designs that would allow for more accurate and predictable correction of the charge loss associated with crystal defects. In this work, we demonstrate that high-granularity position-sensitive detectors can significantly improve the performance of CZT detectors fabricated from CZT crystals with wider acceptance boundaries, leading to an increase of their availability and expected decrease in cost.

Front-End ASIC for High Resolution X-Ray Spectrometers

Homogeneity of properties related to material crystallinity is a critical parameter for achieving high-performance CdZnTe (CZT) radiation detectors. Unfortunately, this requirement is not always satisfied in todays commercial CZT material due to high concentrations of extended defects, in particular subgrain boundaries, which are believed to be part of the causes hampering the energy resolution and efficiency of CZT detectors. In the past, the effects of subgrain boundaries have been studied in Si, Ge and other semiconductors. It was demonstrated that subgrain boundaries tend to accumulate secondary phases and impurities causing inhomogeneous distributions of trapping centers. It was also demonstrated that subgrain boundaries result in local perturbations of the electric field, which affect the carrier transport and other properties of semiconductor devices. The subgrain boundaries in CZT material likely behave in a similar way, which makes them responsible for variations in the electron drift time and carrier trapping in CZT detectors. In this work, we employed the transient current technique to measure variations in the electron drift time and related the variations to the device performances and subgrain boundaries, whose presence in the crystals were confirmed with white beam X-ray diffraction topography and infrared transmission microscopy.

Use of high-granularity position sensing to correct response non-uniformities of CdZnTe detectors

We present an ASIC for a 3He gas detector to be used in small angle neutron scattering experiments at the Spallation Neutron Source in Oak Ridge. The ASIC is composed of 64 channels with low noise charge amplification, filtering, timing and amplitude measurement circuits, where an innovative current-mode peak-detector and digitizer (PDAD) is adopted. The proposed PDAD provides at the same time peak detection and A/D conversion in real time, at low power, and without requiring a clock signal. The channels share an efficient data sparsification and derandomization scheme, a 30-bit 256 deep FIFO, and low voltage differential signaling.