Eiki Kamada

A performance and cost analysis of applying superscalar method to mainframe computers

The paper presents the results of evaluating the increased performance and cost of mainframe computers with superscalar architectures. Since mainframe users demand object compatibility, we assume the same object as that of nonsuperscalar machines. We compared four differently configured superscalar machines based on Hitachis high end mainframe computer, the HITAC M-880, varying the multiplicity of operand accessibility and arithmetic capability. In estimating performance, we considered the effect of critical path delay on machine cycle time. For scientific jobs, either dual operand accessibility or dual arithmetic capability, or both, improved performance (MIPS) by 11-28% while increasing CPU hardware cost by 2-21%. For online transaction processing (OLTP), no configuration increased performance more than 4%. To make the superscalar architecture more effective for OLTP, it is important to reduce execution cycles per instruction (CPI), by reducing overhead caused by sequential processes. >

Logic design for a high performance mainframe computer-the HITAC M-880 processor

Logic design and its effects on the HITAC M-880 basic scalar processor are described. The M-880 is a high end mainframe computer which uses current high speed circuits and packaging technologies, as well as logic methods, to improve performance. An optimal pipeline stage evaluation method is proposed, together with a new cache access method termed merge access. The combined effect of the logic methods is a 10% improvement in processor performance with online transaction processing.<<ETX>>