Yooichi Shintani
Hitachi
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Publication
Featured researches published by Yooichi Shintani.
IEEE Transactions on Computers | 1995
Yooichi Shintani; Kiyoshi Inoue; Eiki Kamada; Toru Shonai
The paper presents the results of evaluating the increased performance and cost of mainframe computers with superscalar architectures. Since mainframe users demand object compatibility, we assume the same object as that of nonsuperscalar machines. We compared four differently configured superscalar machines based on Hitachis high end mainframe computer, the HITAC M-880, varying the multiplicity of operand accessibility and arithmetic capability. In estimating performance, we considered the effect of critical path delay on machine cycle time. For scientific jobs, either dual operand accessibility or dual arithmetic capability, or both, improved performance (MIPS) by 11-28% while increasing CPU hardware cost by 2-21%. For online transaction processing (OLTP), no configuration increased performance more than 4%. To make the superscalar architecture more effective for OLTP, it is important to reduce execution cycles per instruction (CPI), by reducing overhead caused by sequential processes. >
IEEE Transactions on Computers | 1996
Yooichi Shintani; Toru Shonai; Hiroshi Kurokawa; Kazunori Kuriyama; Akira Yamaoka
This paper introduces a methodology, called hierarchical execution, which reduces stalls caused by pipeline interlocks such as data and control dependencies. Since a lot of software has been accumulated in mainframe computer systems as object code, it is important to improve performance without having to recompile the code for optimization. Our methodology consists of a simple pre-ALU that generates results, with shorter latency than the main ALU, asynchronously, which reduces the overhead especially for address generation interlocks and branch instructions. This method was implemented in Hitachis mainframe processors, M-680 and M-880. In M-680, the pre-ALU, together with the instruction decoder, processes instructions in superpipelined fashion, which further improves performance. The aggregate effect of hierarchical execution on CPU time, for evaluated benchmarks, is 10% on average, with only a 1.6% increase in hardware. Therefore, we can roughly say that the hierarchical execution method improved cost performance by 8%.
Archive | 1987
Yooichi Shintani; Kazunori Kuriyama; Tohru Shonai; Eiki Kamada; Kiyoshi Inoue
Archive | 1993
Shinji Fujiwara; Mitsuru Nagasaka; Yooichi Shintani
Archive | 1986
Eiki Kamada; Yooichi Shintani; Tohru Shonai; Shigeo Takeuchi
Archive | 1985
Yooichi Shintani; Tohru Shonai; Eiki Kamada; Shigeo Takeuchi
Archive | 1987
Eiki Kamada; Yooichi Shintani; Kazunori Kuriyama; Tohru Shonai; Kiyoshi Inoue
Archive | 1984
Shizuo Gotou; Toyohiko Kagimasa; Seiichi Yoshizumi; Yooichi Shintani
Archive | 1992
Shinji Fujiwara; Yooichi Shintani; Mitsuru Nagasaka; Naoki Hamanaka; Mikiko Suzuki
Archive | 1987
Akira Yamaoka; Kenichi Wada; Kazunori Kuriyama; Yooichi Shintani