Emre Arslan

Novel Lossless Grounded Inductance Simulators Employing only a Single First Generation Current Conveyor

For most electronics circuits, the inductor is not a desirable circuit element. This is attributed to several reasons. Inductors are less standard compared to other passive circuit elements and they must be prepared separately in many applications. The behavior of physical inductors is not sufficiently close to ideal component behavior compared with resistors and capacitors and in terms of spatial dimensions they are larger than the other circuit elements, unless the inductance value is very small. Instead of physical inductor elements, actively simulated inductances have widely been used in many circuits. Actively simulated inductors find application in areas like oscillators and active filter design problems. For this reason, there are many publications on the active simulation of inductances [1-15]. Also many works concentrated on the simulation of floating inductances, which are more general than a grounded inductor [1-6]. Most of the presented op-amp and second generation current conveyor (CCII) based topologies presented up to now realise some of possible inductorresistor-capacitor combinations using the same circuit configuration. The presented grounded inductor simulating topology in reference [1], employs only a single current conveyor, six resistors and one capacitor to obtain six types of inductors that is ideal L, L with a series positive resistance, L with a series negative resistance, L with a parallel positive resistance, L with a parallel negative resistance and the bilinear form. Moreover for each type of inductor all five passive elements are used. Some of them are related with simulation of only series immittance function [8-9]. Several specific circuits for the simulation ofR-L and C-D immittances have been reported in the literature [10-13]. Universal series and parallel immittance simulator topologies employing two FTFNs are presented in a recent work [13]. A general immittance simulator circuit that enable simulation of all possible form of inductors is proposed in reference [14]. The main objective of this paper is to present actively simulated grounded lossless inductors in a simple form that provide further possibilities to the designers in the realisation of analogue signal processing circuits. The first generation current conveyor (CCI) is used as the active element. Some advantages of the first generation current conveyor over CCII is discussed in [16]. For example it is shown that the existence of the internal current feedback from z terminal to the y terminal

Voltage-mode MOS-only all-pass filter

In this study, a simple voltage-mode first-order all-pass (AP) filter implementation is presented which employs only MOS transistors instead of active elements like CCH, CDBA, FTFN, etc. that include large number of transistors. Transconductance (gm) and gate-to-source parasitic capacitance (Cgs) of the transistors are employed to form the AP transfer function. It is shown that simulations are in good agreement with the theoretical results.

Wideband self-biased CMOS CCII

Wideband, self-biased, second generation current conveyor (CCII) is proposed. It is shown that the proposed CCII exhibits superior performance compared to its previous counterparts in terms of bandwidth, parasitic resistance and voltage swing on port X. Also, the proposed CCII uses no additional biasing voltage or current sources other than the two supply rails.

SELF-BIASING CURRENT CONVEYOR FOR HIGH FREQUENCY APPLICATIONS

A new, self-biasing, differential pair-based and high performance CMOS CCII circuit is proposed which uses no additional biasing voltage or current sources other than the two supply rails. The proposed circuit has high voltage swings on ports X and Y, very low equivalent impedance on port X, high equivalent impedances on ports Y and Z and also wideband voltage and current transfer ratios. The noise analysis of the proposed CCII circuit is studied. Input referred noise voltage at high impedance port Y and input referred noise current at low impedance port X are obtained to form the noise model. Some filter circuits are selected from the literature and their noise comparisons are performed. It is shown that the noise values can differ greatly even though the filter circuits or the passive element values are identical.

HIGH-SLEW RATE LOW-QUIESCENT CURRENT RAIL-TO-RAIL CMOS BUFFER AMPLIFIER FOR FLAT PANEL DISPLAYS

This work presents a high-slew rate rail-to-rail buffer amplifier, which can be used for flat panel displays. The proposed buffer amplifier is composed of two transconductance amplifiers, two current comparators and a push-pull output stage. Phase compensation technique is also used to improve the phase margin value of the proposed buffer amplifier for different load capacitances. Post-layout simulations of the proposed buffer amplifier are performed using 0.35 μm AMS CMOS process parameters and 3.3 V power supply. The circuit is tested under a 600 pF capacitive load. An average settling time of 0.85 μs under a full voltage swing is obtained, while only 3 μA quiescent current is drawn from the power supply. Monte Carlo analysis is also added to show the process variation effects on the circuit.

Dual output filter topology with a single NIC for pole frequency sensitive applications

In this article a dual output filter synthesis topology is proposed using a negative impedance converter (NIC) and the minimum number of passive components. Different from the preceding NIC based synthesis methods, the proposed circuits allow passive element matching to reduce the number of passive elements. The proposed dual output topology can simultaneously provide all-pass, notch/high-pass or notch/low-pass filter configurations. Also, the proposed filters have a pole frequency independent of the voltage and current gain deviations of the active element, so it is suitable for pole frequency sensitive applications. Simulations, including a post-layout simulation, Monte-Carlo analysis and Routh-Hurwitz stability tests are performed to verify the theoretical results.

A high gain and low-offset current-mode instrumentation amplifier using differential difference current conveyors

In this work, a current-mode high CMRR and low offset instrumentation amplifier is proposed. In the structure, only differential difference current conveyors (DDCC) are employed. The offset of the instrumentation amplifier is suppressed using an integrator feedback stage. The CMRR of the system is simulated using mismatch models for the DDCC elements employed. The CMRR of the instrumentation amplifier is independent of resistor mismatches and high CMRR is achieved if good matching of the differential transistors of each current conveyor is provided. The proposed instrumentation amplifier is designed using 0.35μm technology and simulated using HSPICE. The designed instrumentation amplifier provides high CMRR with low offset and it is especially suitable for AC coupled measurements. The simplicity of the design structure is the main advantage of the provided design where only DDCC elements are required for high CMRR and high output swing.

A compact rail-to-rail CMOS buffer amplifier with very low quiescent current

In this work, a very compact, rail-to-rail, high-speed buffer amplifier for liquid crystal display (LCD) applications is proposed. Compared to other buffer amplifiers, the proposed circuit has a very simple architecture, occupies a small number of transistors and also has a large driving capacity with very low quiescent current. It is composed of two complementary differential input stages to provide rail-to-rail driving capacity. The push–pull transistors are directly connected to the differential input stage, and the output is taken from an inverter. The proposed buffer circuit is laid out using Mentor Graphics IC Station layout editor using AMS 0.35 μm process parameters. It is shown by post-layout simulations that the proposed buffer can drive a 1 nF capacitive load within a small settling time under a full voltage swing, while drawing only 1.6 μA quiescent current from a 3.3 V power supply.

All-pass sections realized with single first generation current conveyor

Current conveyor was developed by Sedra at almost the same time with the commercial IC opamp in 1968. Although it is one of the oldest active components and has a better frequency response than opamp, there are not as many applications presented in the literature as with the opamp that is used in a wide variety of applications in electronic circuits. This paper aims to use this old however beneficial element in the analogue filter area by giving several new all-pass filter applications. All circuits given employ a single capacitor and are therefore canonic in the number of capacitors.

A tunable immitance simulator with a voltage differential current conveyor

In this paper, an electronically tunable immitance circuit is proposed. The presented circuit can be configured as a tunable grounded inductor or capacitor multiplier. The proposed circuit employs a single active element called Voltage Differential Current Conveyor, a single resistor and a single capacitor. The presented circuit does not require element matching constraints. It is linearly tunable over four decades of frequency using bias current control. Simulation results are included to verify theory.