F.J. Garcia Sanchez
Simón Bolívar University
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Featured researches published by F.J. Garcia Sanchez.
Microelectronics Reliability | 2002
A. Ortiz-Conde; F.J. Garcia Sanchez; Juin J. Liou; A. Cerdeira; M. Estrada; Y. Yue
The threshold voltage value, which is the most important electrical parameter in modeling MOSFETs, can be extracted from either measured drain current or capacitance characteristics, using a single or more transistors. Practical circuits based on some of the most common methods are available to automatically and quickly measure the threshold voltage. This article reviews and assesses several of the extraction methods currently used to determine the value of threshold voltage from the measured drain current versus gate voltage transfer characteristics. The assessment focuses specially on single-crystal bulk MOSFETs. It includes 11 different methods that use the transfer characteristics measured under linear regime operation conditions. Additionally two methods for threshold voltage extraction under saturation conditions and one specifically suitable for non-crystalline thin film MOSFETs are also included. Practical implementation of the several methods presented is illustrated and their performances are compared under the same challenging conditions: the measured characteristics of an enhancement-mode n-channel single-crystal silicon bulk MOSFET with state-of-the-art short-channel length, and an experimental n-channel a-Si:H thin film MOSFET. 2002 Elsevier Science Ltd. All rights reserved.
Solid-state Electronics | 2001
A. Cerdeira; M. Estrada; Reineiry Garcia; A. Ortiz-Conde; F.J. Garcia Sanchez
Abstract A new procedure is proposed to extract basic parameters for the AIM-Spice amorphous thin film transistor model in the above-threshold region. Our method avoids non-linear optimization, which is mainly the method utilized up to now, when using a program extractor included in AIM-Spice. The present extraction procedure is based on the integration of the experimental data current. The integration method as in known is convenient to decrease the effects of experimental noise. The method is applied to the linear and saturation regions for the above-threshold regime and allows the extraction of all the above-threshold parameters. The accuracy of the simulated curves using the parameters extracted with the new procedure is verified with measured and calculated data using the expressions contained in the model.
Solid-state Electronics | 2003
A. Ortiz-Conde; F.J. Garcia Sanchez; M. Guzmán
Two useful applications of the Lambert W function to undoped-body MOSFET modeling are presented. Firstly, it is applied to the problem of inverting the gate voltage versus channel surface potential equation. The result is an exact analytical solution of the channel surface potential as an explicit function of the gate voltage for either n or p channel operation. Additionally an approximate but highly accurate analytical solution is presented which is continuously valid for all regions of operation. Secondly, we propose a new unambiguous analytical definition for the threshold voltage of these undoped-body devices. This definition overcomes the impossibility of using the traditional definition based on the bulk Fermi potential, and the ambiguities introduced by other definitions. The threshold voltage is mathematically described also using the Lambert W function at the transition point from subthreshold to superthreshold behavior. An approximation for the )1 branch of the Lambert W function is proposed to express the threshold voltage approximately using elementary logarithmic functions. These new descriptions are then verified against two-dimensional numerical device simulations. 2003 Elsevier Ltd. All rights reserved.
Solid-state Electronics | 1999
A. Ortiz-Conde; Yuansheng Ma; J. Thomson; E. Santos; Juin J. Liou; F.J. Garcia Sanchez; M. Lei; J. Finol; P. Layman
Direct extraction of semiconductor device parameters using lateral optimization method A. Ortiz-Conde, Yuansheng Ma, J. Thomson, E. Santos, J.J. Liou*, F.J. Garco a Sa nchez, M. Lei, J. Finol, P. Layman Departamento de ElectroÂnica, Universidad SimoÂn BoloÂvar, Apartado 89000, Caracas, 1080-A, Venezuela Department of ECE, University of Central Florida, Orlando, FL 32816-2450, USA Modeling and Simulation Group, Lucent Technologies, Orlando, FL, USA Motorola, 3102 North 56th Street, Phoenix, Arizona 85018, USA
Solid-state Electronics | 1992
A. Ortiz-Conde; R. Herrera; P.E. Schmidt; F.J. Garcia Sanchez; J. Andrian
Abstract Based on the procedure of Pierret and Shields [1, Solid-St. Electron. 26 , 143, 1983] for the long-channel bulk MOSFET, a new single-integral expression is obtained to describe the current-voltage characteristics for the silicon-on-insulator (SOI) MOSFET. This expression is valid for: any degree of inversion, all back-gate bias conditions and any semiconductor film thickness. Our single-integral expression, applied to a given back-gate bias condition and using the appropriate approximations, can be simplified to the results of the previous models.
Solid-state Electronics | 2000
F.J. Garcia Sanchez; A. Ortiz-Conde; G. De Mercato; J.A. Salcedo; Juin J. Liou; Y. Yue
Abstract A new alternative technique is proposed to extract the threshold voltage from the subthreshold-to-strong inversion transition region of MOSFETs. It uses an auxiliary operator that involves integration of the drain current as a function of gate voltage. Tests show that the procedure produces results comparable to conventional methods.
Microelectronics Reliability | 2006
F.J. Garcia Sanchez; A. Ortiz-Conde; Juan Muci
Undoped-body MOSFETs are currently becoming increasingly important and the value of threshold voltage is often used to assess the reliability of fabricated devices. However there exists a disparity of threshold voltage criteria proposed for these novel devices. The concept of threshold voltage in undoped-body MOSFETs is examined and various existing criteria are analyzed and compared in an effort to clarify the ambiguity of the meaning of threshold and understand its dependence on technological parameters in these devices. Phenomenological considerations are also presented to shed light on the behavior of the sub-threshold slope with changing semiconductor body thickness.
Solid-state Electronics | 1999
J.C. Ranuárez; F.J. Garcia Sanchez; A. Ortiz-Conde
A technique is proposed to extract the reverse saturation current parameter and ideality factor of semiconductor junctions from the low forward voltage region of the device’s characteristics. The method involves performing a mathematical operation on the experimental data that allows to calculate the parameters at values of forward current smaller than the reverse saturation current. The procedure was tested and its accuracy verified on synthetic I‐V characteristics, with and without added simulated experimental error or noise. Good agreement is obtained between the parameters used in modeling and the extracted values. The procedure was also applied to experimentally measured IB‐VBE characteristics of a real power BJT. # 1999 Elsevier Science Ltd. All rights reserved.
Proceedings of First International Caracas Conference on Devices, Circuits and Systems | 1995
F.J. Garcia Sanchez; A. Ortiz-Conde; G. De Mercato; J.J. Liou; L. Recht
A network theorem based on potential functions is used for the purpose of cancelling the detrimental effect that the presence of parasitic linear elements has on procedures used for extracting the intrinsic-model parameters of semiconductor devices. The method is based on the use of an auxiliary function: the difference between the content and the co-content functions of the device. The theorem states that, for any arbitrarily connected network of linear and nonlinear branch elements, the summation of the difference functions of each of the branches is zero, and that this difference function is zero at any branch represented by a linear I-V characteristic. In establishing this theorem we also show that: (a) the summation of the contents, over all the branches, is zero; and (b) the summation of the co-contents, over all the branches, is zero. To illustrate the procedure the intrinsic model parameters of a real p-n junction are extracted using this idea.
Solid-state Electronics | 2002
M. Estrada; A. Cerdeira; A. Ortiz-Conde; F.J. Garcia Sanchez; B. Iñiguez
A procedure is presented to extract above and sub-threshold model parameters in polysilicon TFTs. It is based on the integration of the experimental data current, which has the advantage of reducing the effects of experimental noise. This method is applied to the linear and saturation regions for the above-threshold regime and allows the extraction of all the above-threshold and sub-threshold parameters. We already presented a unified extraction method for the above threshold parameters of a-Si:H and polysilicon TFTs, where the above-threshold regime the mobility is modeled as a function of the gate voltage to a power. An integration procedure is used to extract the device model parameters. In this paper, we complete the extraction procedure to cover all the device operation regions, that is the sub-threshold and above-threshold regimes. The extraction procedure provides in addition the possibility of monitoring the crystallization process of a-Si:H TFTs into polysilicon, which has become a widely used process of fabricating low temperature polysilicon TFTs. The process of polycrystallization manifests itself by a variation and change in sign of one of the model parameters. Extracted parameters can be correlated to input parameters required by AIM-Spice circuit simulator for device modeling. The accuracy of the simulated curves using the extracted parameters is verified with measurements.