Florian Bohn

A Fully Integrated Quad-Band GSM/GPRS CMOS Power Amplifier

Concentric distributed active transformers (DAT) are used to implement a fully-integrated quad-band power amplifier (PA) in a standard 130 nm CMOS process. The DAT enables the power amplifier to integrate the input and output matching networks on the same silicon die. The PA integrates on-chip closed- loop power control and operates under supply voltages from 2.9 V to 5.5 V in a standard micro-lead-frame package. It shows no oscillations, degradation, or failures for over 2000 hours of operation with a supply of 6 V at 135degC under a VSWR of 15:1 at all phase angles and has also been tested for more than 2 million device-hours (with ongoing reliability monitoring) without a single failure under nominal operation conditions. It produces up to +35 dBm of RF power with power-added efficiency of 51%.

A Fully-Integrated Quad-Band GSM/GPRS CMOS Power Amplifier

Concentric distributed active transformers (DAT) are used to implement a fully-integrated quad-band power amplifier (PA) in a standard 130 nm CMOS process. The DAT enables the power amplifier to integrate the input and output matching networks on the same silicon die. The PA integrates on-chip closed- loop power control and operates under supply voltages from 2.9 V to 5.5 V in a standard micro-lead-frame package. It shows no oscillations, degradation, or failures for over 2000 hours of operation with a supply of 6 V at 135degC under a VSWR of 15:1 at all phase angles and has also been tested for more than 2 million device-hours (with ongoing reliability monitoring) without a single failure under nominal operation conditions. It produces up to +35 dBm of RF power with power-added efficiency of 51%.

A Scalable 6-to-18 GHz Concurrent Dual-Band Quad-Beam Phased-Array Receiver in CMOS

This paper reports a 6-to-18 GHz integrated phased- array receiver implemented in 130-nm CMOS. The receiver is easily scalable to build a very large-scale phased-array system. It concurrently forms four independent beams at two different frequencies from 6 to 18 GHz. The nominal conversion gain of the receiver ranges from 16 to 24 dB over the entire band while the worst-case cross-band and cross-polarization rejections are achieved 48 dB and 63 dB, respectively. Phase shifting is performed in the LO path by a digital phase rotator with the worst-case RMS phase error and amplitude variation of 0.5deg and 0.4 dB, respectively, over the entire band. A four-element phased-array receiver system is implemented based on four receiver chips. The measured array patterns agree well with the theoretical ones with a peak-to-null ratio of over 21.5 dB.

Fully integrated frequency and phase generation for a 6–18GHz tunable multi-band phased-array receiver in CMOS

Fully integrated frequency-phase generators for a 6-18 GHz wide-band phased-array receiver element are presented that generate 5-7 GHz and 9-12 GHz first LO signals with less than -95 dBc/Hz phase noise at 100 kHz offset. Second LO signals with digitally controllable four-quadrant phase- and amplitude spread with better than 3deg resolution are generated and allow removal of systematic reference clock skew as well as accurate selection of the received signal phase. This frequency- and phase generation scheme was successfully demonstrated in a 6-18 GHz receiver system configured as an electrical 4-element array.

A tunable concurrent 6-to-18GHz phased-array system in CMOS

This paper presents a scalable phased-array receiver system that covers a tritave bandwidth of 6-to-18 GHz implemented in a 130nm CMOS process. The single receiver element with a 10-bit phase shifting resolution achieves a maximum phase error of 2.5° within a baseband amplitude variation of 1.5dB for an arbitrary target angle. This dense interpolation provides excellent phase error/offset calibration capability in the array. A 4-element electrical array pattern is measured at 6GHz, 13.5GHz and 18GHz, showing a worst case peak-to-null ratio of 21.5dB. The EVM and phase noise improvements of the array compared with the single receiver element are also shown.

Closed-loop spurious tone reduction for self-healing frequency synthesizers

On-chip spurious tone detection and correction in an 8–12 GHz CMOS synthesizer is used to automatically reduce spurious output tones at different offset frequencies by up to 20dB. Using synchronous detection, sensitivity is limited by detection time only. The presented methods are generally applicable to frequency synthesizers and phased-locked loops in various applications.

Demonstration of a switchless Class E/F/sub odd/ dual-band power amplifier

A 250 W dual-band power amplifier belonging to the Class E/F switching amplifier family is presented. The amplifier operates in the 7 MHz and 10 MHz HAM bands, achieving 16 dB and 15 dB gain with power added efficiencies (PAE) of 92% and 87% in those bands, respectively. It utilizes dual-resonant passive input and output networks to achieve high-efficiency Class E/F/sub odd/ operation at both frequencies of operation, allowing the same passive networks to be used for both frequency bands without the use of band-select switches.

A lightweight tile structure integrating photovoltaic conversion and RF power transfer for space solar power applications

We demonstrate the development of a prototype lightweight (1.5 kg/m) tile structure capable of photovoltaic solar power capture, conversion to radio frequency power, and transmission through antennas. This modular tile can be repeated over an arbitrary area to form a large aperture which could be placed in orbit to collect sunlight and transmit electricity to any location. Prototype design is described and validated through finite element analysis, and high-precision ultra-light component manufacture and robust assembly are described.

Fully integrated CMOS X-Band power amplifier quad with current reuse and dynamic digital feedback (DDF) capabilities

A 10GHz fully-integrated stacked PA quad with dynamic digital feedback and control loops provides total output power of 200mW at 37% PAE. It utilizes data provided by multiple on-chip sensors to maintain safe operating conditions and regulate the individual power PA power supply voltages and independent power control for each PA. This digitally controlled stacked PA quad with on-chip matching allows higher operation voltages while maintaining current consumption constant, leading to higher overall system efficiency, as ohmic drop losses under large supply-to-breakdown voltage ratios are reduced.