Florian Gstrein

High-frequency electrical properties of individual and bundled carbon nanotubes

Bundles of single wall carbon nanotubes have been proposed as an interconnect that could potentially replace copper in state-of-the-art ultralarge-scale-integrated circuits if theoretically predicted inductance, resistance, and capacitance scale with the number of carbon nanotubes within the bundle. The authors report direct measurement of the kinetic inductance of individual single wall carbon nanotubes and measurement of the high-frequency impedance of bundles showing that the bundle inductance scales with the number of individual carbon nanotubes.

Demonstration of a 12 nm-half-pitch copper ultralow-k interconnect process

A process to achieve 12 nm half-pitch interconnect structures in ultralow-k interlayer dielectric (ILD) is realized using standard 193 nm lithography. An optimized pattern transfer that minimizes unwanted distortion of ILD features is followed by copper fill. Electrical measurements that validate functionality of the drawn structures are presented.

Investigation of novel inorganic resist materials for EUV lithography

Recently, both PSI1 and ASML2 illustrated champion EUVL resolution using slow, non-chemically amplified inorganic resists. However, the requirements for EUVL manufacturing require simultaneous delivery of high resolution, good sensitivity, and low line edge/width roughness (LER/LWR) on commercial grade hardware. As a result, we believe that new classes of materials should be explored and understood. This paper focuses on our efforts to assess metal oxide based nanoparticles as novel EUV resists3. Various spectroscopic techniques were used to probe the patterning mechanism of these materials. EUV exposure data is presented to investigate the feasibility of employing inorganic materials as viable EUV resists.

Patterning challenges in the fabrication of 12 nm half-pitch dual damascene copper ultra low-k interconnects

Earlier [1, 2] work highlighted an integrated process for electrically functional 12 nm half-pitch copper interconnects in an ultralow-k interlayer dielectric (ILD). In this paper, we focus on understanding and reducing undesired effects such as pattern asymmetry/distortion, and line undulation/ collapse. Key defect modes and possible solution paths are discussed. Line undulation can occur when the ILD feature changes shape under the stress of the sacrificial hard mask(s) (HM) during patterning, resulting in “wavy” instead of straight features. The amount of undulation is directly related to mechanical properties such as elastic modulus, residual stresses of patterned HMs and the ILD, as well as the dimensions and aspect ratio of the features. Line collapse is observed post wet-clean processing when one or more of the following is true - Insufficient ILD mechanical strength, excessive pattern aspect ratio, or non-uniform drying. Pattern asymmetry, or unequal critical dimensions (CD) of trenches defined by the same backbone, is a typical problem encountered during spacer-based pitch division. In pitch quartering (P/4), three different trench widths result from small variations in backbone lithography, spacer CD and etch bias. Symmetric patterning can be achieved through rigorous control of patterning processes like backbone definition, spacer deposition and downstream etches. Plasma-based ash and energetic metal deposition were also observed to degrade patterning fidelity of ultra low-k film, and also need to be closely managed.

Material readiness for generation 2 directed self-assembly (DSA) < 24nm pitch

The self-assembling behavior of thermally annealed PS-b-PMMA block copolymer derivatives (GEN2 BCPs) was evaluated using a substrate modified by a random copolymer, commonly called a ‘brush’. Similar to PS-b-PMMA, surface modification using the random copolymer brush served as an effective technique for controlling the domain orientation of the GEN2 BCP and yielded aligned features with pitches below 24nm. Non-preferential and weakly preferential random copolymers were also defined and applied to DSA using a graphoepitaxial approach. Finally, a Dry Development Rinse Process (DDRP)[1] was tested as a method to prevent pattern collapse and improve pattern transfer for GEN2 BCPs.

Dry development rinse process for ultimate resolution Improvement via pattern collapse mitigation

Pattern collapse currently limits the achievable resolution of the highest resolving EUV photoresists available. The causes of pattern collapse include the surface tension of the rinse liquid and the shrinkage of the resist pattern during the drying step. If these collapse mechanisms can be successfully mitigated with process approaches that do not require changes to the resist itself, the ultimate resolution of existing EUV resists can be improved. Described here is a dry development rinse process, applicable to existing EUV photoresists, which prevents pattern collapse to both improve ultimate resolution and the process window of currently resolvable features. Reducing the burden of collapse prevention on the resist also allows improvements in line width roughness (LWR) and cross section profile and provides additional degrees of freedom for future resist design.