Francisco Serra-Graells

A Compact and Low-Power CMOS Circuit for Fully Integrated NEMS Resonators

This brief presents a fully integrated nanoelectromechanical system (NEMS) resonator, operable at frequencies in the megahertz range, together with a compact built-in CMOS interfacing circuitry. The proposed low-power second-generation current conveyor circuit allows detailed read-out of the nanocantilever structure for either extraction of equivalent circuit models or comparative studies at different pressure and dc biasing conditions. In this sense, extensive experimental results are presented for a real mixed electromechanical system integrated through a combination of in-house standard CMOS technology and nanodevice post-processing by nanostencil lithography. The proposed read-out scheme can be easily adapted to operate the nanocantilever in closed loop operation as a stand-alone NEMS oscillator

VLSI CMOS low-voltage log companding filters

This article presents new low-voltage circuit techniques for CMOS companding filters. After reviewing the general log filtering principle, valid structures are explored for MOS devices operating in weak inversion. Different low-voltage basic building blocks are then proposed along with required auxiliary control circuitry. Finally, a specific design procedure to synthesize arbitrary tunable transfer functions and some practical examples are given.

Low-Power and Compact CMOS APS Circuits for Hybrid Cryogenic Infrared Fast Imaging

This brief presents a complete set of CMOS basic building blocks for low-cost scanning infrared (IR) cryogenic imagers. Low-power and compact novel circuits are proposed for single-capacitor integration and correlated double sampling, embedded pixel test, pixel charge-multiplexing and video composition and buffering. In order to validate the new basic building blocks, experimental results are reported in standard 0.35-mum CMOS technology for a 50 mum x 100 mum active pixel cell operating at 77 K. Based on the proposed circuits, IR imagers capable of capturing up to 256 x 2560 pixels at 25 fps can be implemented.

Low-Voltage CMOS subthreshold log-domain filtering

This paper presents both a complete set of very low-voltage basic building blocks and a compact design methodology for log filtering in standard or even digital CMOS technologies. The new proposals are based on an alternative translinear loop principle for the MOSFET operating in its subthreshold region. Three different sets of complete basic building blocks are proposed along with all required auxiliary circuitry and a specific matrix design procedure to obtain stable and compact filter implementations. Also, all-MOS filter implementations following these circuit techniques are studied. Simulated and experimental examples are given at 1-V supply voltage for 1.2and 0.35-/spl mu/m CMOS technologies. The resulting circuit techniques are suitable to integrate very low-voltage low-power system-on-a-chip audio applications, such as hearing aids, in standard CMOS technologies.

All-MOS subthreshold log filters

This article proposes the use of nonlinear capacitors for log filtering thanks to the inner voltage dynamic range compression. The generalized principle is presented and an NMOS implementation for the capacitive element is proposed, which is compatible with existing low-voltage CMOS basic building blocks. The resulting all-MOS circuit technique is suitable to integrate such companding processing in digital VLSI technologies. Two examples for hearing aid circuits (i.e. 1 V supply) are given as demonstrators.

A 25-µW All-MOS Potentiostatic Delta-Sigma ADC for Smart Electrochemical Sensors

This paper presents a low-power all-MOS delta-sigma ADC specifically optimized for the potentiostatic biasing and amperometric read-out of electrochemical sensors. The proposed architecture reuses the dynamic properties of the sensor itself to implement a continuous-time mixed electrochemical delta-sigma modulator with minimalist analog circuits fully integrable in purely digital CMOS technologies. A 25-μW smart electrochemical sensor demonstrator integrated in low-cost 1M CMOS technology with Au post-processing is presented. Experimental results show electrical dynamic range values exceeding 10-bit, while electrochemical figures exhibit linearity levels close to R2 = 0.999 combined with RSD <; 15% in terms of reproducibility. A comparative test with commercial potentiostat equipment is also included to qualify the performance of the proposed ADC.

Full wafer integration of NEMS on CMOS by nanostencil lithography

Wafer scale nanostencil lithography is used to define 200 nm scale mechanically resonating silicon cantilevers monolithically integrated into CMOS circuits. We demonstrate the simultaneous patterning of ~2000 nano-devices by post-processing standard CMOS wafers using one single metal evaporation, pattern transfer to silicon and subsequent etch of the sacrificial layer. Resonance frequencies around 1.5 MHz were measured in air and vacuum and tuned by applying dc voltages of 10V and 1V respectively

A 0.3-mW/Ch 1.25 V Piezo-Resistance Digital ROIC for Liquid-Dispensing MEMS

A low-power multichannel CMOS digital read-out IC (ROIC) for differential piezo-resistive sensing is presented as part of the positioning system of a liquid dispensing MEMS. New very low-voltage and single-battery compatible CMOS circuits are proposed for digital gain tuning, pre-amplification, and integrating A/D conversion. Overall low-power consumption is achieved by operating the key devices in subthreshold in order to prevent from heating the fluidic MEMS. A complete quad-channel ROIC has been integrated in 0.35- ¿m CMOS 2-polySi 4-metal technology. The reported experimental results agree with the electrical simulations.

A 400

This paper presents a low-power and fully integrated frontend channel for long-wave infrared spectroscopic gas recognition. The proposed channel circuitry includes: input sensor biasing, sub-Hz high-pass filtering and pre-amplification, differential blind cancellation, and lock-in A/D conversion. The proposed CMOS circuits make extensive use of transistor subthreshold operation and digital programmability. Experimental results are presented for a 0.3 mm2 400 μW channel prototype integrated in 0.35 μm CMOS technology.

\mu

This paper presents a new low-power compact CMOS active pixel circuit specifically optimized for full-field digital mammography. The proposed digital pixel sensor (DPS) architecture includes self-bias capability at ±10% accuracy, up to 15 nA of dark-current autocalibration, built-in test mechanisms, selectable e-/h+ collection, 10-b lossless charge-integration analog-to-digital conversion, more than 1 decade of individual gain tuning for fixed pattern noise cancellation, and a 50-Mb/s digital-only input/output interface. Experimental results for a 70-μm pitch 8-μW DPS cell example are reported in 0.18-μm CMOS 1-polySi 6-metal technology.