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Featured researches published by Franz Neppl.


international symposium on microarchitecture | 1992

CMOS technology trends and economics

Armin Wieder; Franz Neppl

CMOS has become the mainstream IC technology. Extending well into the sub-0.1- mu m regime, its potential provides enormous chip complexities for integration of complete systems on one chip. A number of general trends in the development and manufacturing of CMOS technologies and ICs are discussed. It is argued that unrestricted availability of this technology is of strategic importance for the European high-technology industry. Exploding development costs and investments per technology generation require global cooperation, particularly for the relatively small European IC manufacturers to survive in this key technology. Trends in the development of 64-Mb and 256-Mb DRAMs, optical lithography processes, multilayer resist technologies, retrograde-well structures for CMOS device isolation, low-resistive and dense interconnection systems with low capacitances and silicon-on-insulator technology for the development of CMOS devices are described.<<ETX>>


Archive | 1988

Method of manufacturing integrated circuit containing bipolar and complementary MOS transistors on a common substrate

Franz Neppl; Josef Winnerl


Archive | 1987

Forming retrograde twin wells by outdiffusion of impurity ions in epitaxial layer followed by CMOS device processing

Franz Neppl; Erwin Jacobs; Josef Winnerl; Carlos-Alberto Mazure-Espejo


Archive | 1994

MOSFET on SOI substrate

Franz Neppl; Josef Winnerl


Archive | 1984

Method of making MOS device using metal silicides or polysilicon for gates and impurity source for active regions

Ulrich Schwabe; Franz Neppl; Ulf Burker; Werner Christoph


Archive | 1989

Circuit containing integrated bipolar and complementary MOS transistors on a common substrate

Franz Neppl; Josef Winnerl


Archive | 1997

Method for detaching chips from a wafer

Franz Neppl


Archive | 1983

Method for the manufacture of integrated MOS-field effect transistor circuits silicon gate technology having diffusion zones coated with silicide as low-impedance printed conductors

Ulrich Schwabe; Franz Neppl; Konrad Hieber


Archive | 1986

Process for producing CMOS having doped polysilicon gate by outdiffusion of boron from implanted silicide gate

Heike Gierisch; Franz Neppl


Archive | 1989

Method of making an integrated circuit comprising load resistors arranged on the field oxide zones which separate the active transistor zones

Josef Winnerl; Franz Neppl

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