Network


Latest external collaboration on country level. Dive into details by clicking on the dots.

Hotspot


Dive into the research topics where G. Cao is active.

Publication


Featured researches published by G. Cao.


Solid-state Electronics | 2003

A high performance RF LDMOSFET in thin film SOI technology with step drift profile

J. Luo; G. Cao; S.N. Ekkanath Madathil; M.M. De Souza

A radio frequency (RF) LDMOSFET with step drift doping profile on a conventional thin film SOI substrate used for mainstream VLSI technology is evaluated. Detailed simulation indicates that step drift doping can enable increase in the breakdown voltage by as much as 21% in comparison to the conventional uniformly doped drift (UD) LDMOS. In the on-state the kink present in the I–V characteristic of the UD device is eliminated. The other improvements over the UD counterpart include improved on-state breakdown performance, reduced parasitic feedback capacitance, lower on-resistance, improved drain current saturation behaviour and reduced self-heating at bias point.


IEEE Transactions on Device and Materials Reliability | 2007

Design for Reliability: The RF Power LDMOSFET

M.M. De Souza; P. Fioravanti; G. Cao; D. Hinchley

The design of lateral diffused MOSFETs operating under continuous peak power in RF communication applications is one of the most demanding among semiconductor applications. This paper discusses design parameters related to the optimum performance of the transistor and constraints introduced by the fabrication process in achieving them. Nonstandard processing steps include thick pad oxides, a sinker to connect source to the bottom substrate, metal silicided gates, a source shield over the drift region, and often gold metallization for improved electromigration. Additionally, the device requires careful optimization for control of hot-carrier-related bias drift. The impact of negative charge injection in the gate oxide is to degrade the power gain and at higher output power levels, the linearity. The difficulties in assessment of the true impact of hot carriers on these parameters via measurement are highlighted. The contribution of matching impedances and class of bias on hot-carrier degradation is extracted via modeling. A ldquodesign for reliabilityrdquo approach for this product is investigated with four designs of the drift region, evaluated in terms of transconductance, on-resistance, breakdown voltage, capacitance, and hot-carrier immunity. A second-generation source shield demonstrates a tradeoff via significant reduction of feedback capacitance at a cost to transconductance. A deep drift design shows optimization in terms of gain without compromise to the hot-carrier immunity. Recent advances made in terms of packaging and electromigration are reviewed.


ieee international caracas conference on devices circuits and systems | 2002

Progress in silicon RF Power MOS technologies - current and future trends

M.M. De Souza; G. Cao; E.M. Sankara Narayanan; F. Youming; S. K. Manhas; J. Luo; N. Moguilnaia

In this paper, the current progress and factors limiting the performance of silicon RF Power device technologies are reviewed. Silicon VDMOSFETs have high linearity but the gain is low at frequencies in excess of 1 GHz. LDMOSFETs have higher gain and can operate up to 2.4 GHz. However, the linearity and reliability of LDMOSFETs is poor in comparison to VDMOSFETs. New architectures and evolving trends are discussed.


Solid-state Electronics | 2000

A local charge control technique to improve the forward bias safe operating area of LIGBT

S. Hardikar; G. Cao; Y.Z. Xu; M.M. De Souza; E.M. Sankara Narayanan

In this paper, for the first time, we demonstrate that incorporation of a shallow, lightly doped floating P-layer in the drift region of a high voltage CMOS/BiCMOS compatible, 500 V lateral insulated gate bipolar transistor can result in a significant improvement of its forward bias safe operating area. Detailed numerical calculations and analysis show that such an approach can enhance the on-state voltage handling capability without decreasing the breakdown voltage. The position of such a layer is shown to have a significant impact on the SOA performance of the device for the parameters considered. ” 2000 Elsevier Science Ltd. All rights reserved.


international semiconductor conference | 1999

A high performance 60-V class lateral power MOSFET on thin film SOI with a graded doping profile in the drift region

G. Cao; M.M. De Souza; E.M.S. Narayanan

The superior performance of a new 60-V class lateral power MOSFET using a graded doping profile in the drift region has been demonstrated for the first time. A simple technique to achieve the graded doping profile for a 3.5 micron drift length extends the breakdown voltage capability of existing power devices in thin SOI (SIMOX) technology. Our detailed analysis reveals that a significant improvement in the on-state and capacitance-voltage performance is possible in comparison to a conventional uniformly doped device.


Solid-state Electronics | 2000

Trade-off between the Kirk effect and the breakdown performance in resurfed lateral bipolar transistors for high voltage, high frequency applications

G. Cao; M.M. De Souza; E.M.S. Narayanan

Abstract The trade-off between the breakdown performance and the Kirk effect has been evaluated and compared among conventional bipolar transistors and resurfed lateral bipolar transistors. It was demonstrated that the traditional conflict of differing requirements on W c and N c by the breakdown performance and the Kirk effect can be eased by incorporating the resurf principle. Comparative studies have been carried out between the optimized devices with breakdown voltages from 20 to 40 V. It is shown that for an identical breakdown voltage, the high-current-level performance of the resurfed devices can be significantly improved by incorporating a gradually doped collector region. This further leads to a significant increase in the cut-off frequency without degrading the breakdown performance.


international symposium on power semiconductor devices and ic s | 2000

Resurfed lateral bipolar transistors for high-voltage, high-frequency applications

G. Cao; M.M. De Souza; E.M.S. Narayanan

A high performance 40-V lateral bipolar transistor has been evaluated. The incorporation of the Resurf effect together with a gradually doped collector results in a significant suppression of the Kirk effect. As a result, a cut-off frequency of 7 GHz can be obtained with the resurfed device in comparison to 3.5 GHz for the conventional device with an identical breakdown voltage.


international reliability physics symposium | 2004

Hot-carrier injection in step-drift rf power LDMOSFET

G. Cao; M.M. De Souza

In this paper, hot-carrier effect in step-drift RF LDMOSFET is investigated. Due to the lower electric field close to the channel region, substrate current with the step -drift design is much lower than in a single-drift design. However, this is achieved at the expense of transconductance. Furthermore, a second origin of hot-carrier generation is found at the location of step drift. It is demonstrated that, instead of causing bias drift, hot-carrier injection at the step drift influences the voltage and current sweep range. In particular, negative charge can cause degradation of saturation current and breakdown voltage. As a result, power capability decreases during the lifetime of RF amplifier. Transconductance performance degradation at high current levels is also observed, which leads to reduced gain at high power levels.


international conference on neural information processing | 2002

Influence of physical parameters on the quasi-saturation of a power SOI RF LDMOS

J. Luo; G. Cao; O. Spulber; S. Hardikar; Y.M. Feng; E.M.S. Narayanan; M.M. De Souza

In this work, the influence of top silicon thickness T/sub si/, buried oxide thickness T/sub box/ and drift doping N/sub d/ on quasi-saturation in SOI RESURF LDMOS is investigated through extensive 2-D simulations. A physical insight on quasi-saturation in SOI structures with different top silicon thickness is provided. Furthermore the influence of Self-heating effect on quasi-saturation is also presented. The quasi-saturation current increases as the decrease in top silicon thickness up to T/sub si/ 1.0 /spl mu/m with the same drift dose. Beyond this value quasi-saturation current remains unchanged with T/sub si/. The analysis shows that the saturation of carrier velocity in the drift neutral region is the main cause for higher quasi-saturation current in SOI structures with T/sub si/ less than 1.0 /spl mu/m. Under optimum RESURF condition, reducing buried oxide increases the quasi-saturation current dramatically.


Archive | 2002

PROGRESS IN SILICON RF POWER MOS TECHNOLOGIES- CURRENT AND FUTURE TRENDS. (INVITED)

M. M. De Souza; G. Cao; F. Youining; S. K. Manhas; J. Luo; N. Moguilnaia

Collaboration


Dive into the G. Cao's collaboration.

Top Co-Authors

Avatar

M.M. De Souza

Centro Universitário da FEI

View shared research outputs
Top Co-Authors

Avatar
Top Co-Authors

Avatar

J. Luo

De Montfort University

View shared research outputs
Top Co-Authors

Avatar

S. Hardikar

De Montfort University

View shared research outputs
Top Co-Authors

Avatar
Top Co-Authors

Avatar

Y.Z. Xu

De Montfort University

View shared research outputs
Top Co-Authors

Avatar
Top Co-Authors

Avatar

S. K. Manhas

Indian Institute of Technology Roorkee

View shared research outputs
Top Co-Authors

Avatar

F. Youming

De Montfort University

View shared research outputs
Top Co-Authors

Avatar
Researchain Logo
Decentralizing Knowledge