G. Gautier

Influence of precursors gases on LPCVD TFT's characteristics

Abstract In this work, undoped amorphous silicon films were deposited on Corning glass substrates by low pressure chemical vapour deposition using pure disilane as source gas. The deposition temperature and pressure varied from 450 to 525 °C and 20 to 70 Pa, respectively. Silicon films were annealed by solid phase crystallisation at 600 °C and were compared with silicon films deposited from silane at 550 °C and 90 Pa (standard deposition conditions). Results show that layers obtained using disilane gas exhibit higher quality than those from silane. Especially, Hall effect mobility increased from 20 to 55 cm2/V s as a consequence of a higher nucleation time for optimised deposition temperature and pressure. So, two different types of unhydrogenated thin film transistors were made. A 150 nm thick active layer made from silane at 90 Pa and 550 °C permits obtaining an average mobility of 45 cm2/Vs and a threshold voltage of 6 V (with a gate oxide thickness of 40 nm) for N-type. The use of disilane as the precursor gas produces an increase in the mobility of 25% and reduces the threshold voltage to 4 V. Identical CMOS-TFTs devices as inverters were made from silane and disilane for the N- and P-type, respectively. These structures present a good behaviour mainly due to the reduction of the threshold voltage difference.

Macroporous Silicon Electrochemical Etching for Gas Diffusion Layers Applications: Effect of Processing Temperature

MEMS technology requires low cost techniques to permit large scale fabrication for production. Porous silicon (PS) can be used in different manner to replace standard expensive etching techniques like DRIE (Deep Reactive Ion Etching). To perform same process quality as the latter, one need to understand how different parameters can influence porous silicon properties. We investigate here local formation of macroporous silicon on 2D and 3D silicon substrates. The blank substrate is a low doped (26–33 Ω cm) n type 6 inches silicon wafer. Then, an in situ phosphorus-doped polycrystalline silicon (N+ Poly-Si) is deposited on a thermal oxide layer to delimit the regions to be etched. Porous silicon is obtained afterwards using electrochemical anodization in a hydrofluoric acid (HF) solution. The effect of the temperature process on Si-HF electrochemical system voltamperometric curves, macropores morphology and electrochemical etch rates is more specifically studied. Moreover, permeation of porous substrates to hydrogen is studied after various anodization post-treatments such as KOH and HF wet etching or after a thin gold layer deposition used as current collector in micro fuel cells.

Electrochemical Formation of Porous Silicon Carbide for Micro-Device Applications

Anodization of silicon carbide (SiC) in hydrofluoric acid (HF) solutions is a promising way to etch this material which is very resistant against traditional chemical etching methods. Moreover, it has been shown that several reproducible porous SiC morphologies can be performed varying anodization conditions (current density, electrolyte composition, UV lighting) and/or substrate properties (doping type and level). This paper proposes a state of the art of porous SiC etching in GREMAN and a presentation of the morphologies achievable using anodization in HF based electrolytes.

Dynamic electrical characterization of CMOS-like thin film transistor circuits

This tutorial is intended to graduate students, specialized in microelectronics formation. Before this work, the concerned students have spent one week in the cleanroom. In this training, with the help of teachers of the common microelectronics center, they processed and characterized a specific thin film transistor technology. The main goal was to set-up a bench that allows measuring dynamic parameters such as rise time, fall time and oscillator frequency directly on glass substrate and to analyze and explain the results on the base of classical modeling available for VLSI CMOS circuits.