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Dive into the research topics where Gabriel Nagy is active.

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Featured researches published by Gabriel Nagy.


IEEE Transactions on Nanotechnology | 2013

New OBIST Using On-Chip Compensation of Process Variations Toward Increasing Fault Detectability in Analog ICs

Daniel Arbet; Viera Stopjakova; Libor Majer; Gábor Gyepes; Gabriel Nagy

A new on-chip oscillation test strategy for analog and mixed-signal circuits is presented. In the proposed method, onchip Schmitt trigger is used as the on-chip frequency reference to compensate the influence of process parameter variations. Furthermore, this solution also brings the possibility to implement Oscillation-based Built-In Self-Test (OBIST) for analog and mixed-signal integrated circuits. The proposed OBIST strategy has been experimentally applied to active analog integrated filters, and its efficiency in detecting hard-detectable catastrophic faults is presented. To demonstrate applicability of the proposed method also in nanoscale technologies, the method has been used to test a noninverting amplifier designed in 90 nm CMOS technology. Consequently, the impact of scaling was analyzed and the method efficiency in covering catastrophic faults achieved for 0.35 μm and 90 nm CMOS technology were compared.


design and diagnostics of electronic circuits and systems | 2013

Digital methods of offset compensation in 90nm CMOS operational amplifiers

Gabriel Nagy; Daniel Arbet; Viera Stopjakova

This paper deals with comparison of two discrete methods for digital trimming of the input offset voltage in operation amplifiers designed in 90nm CMOS technology. Two different topologies based on the binary weighed ladder, one using successive approximation register (SAR) and the other employing a simple counter, were compared. Furthermore, a correction circuit was proposed and used to form the mean offset voltage and increase the probability that its value after trimming process will be near zero. Finally, achieved results and improvements are discussed.


design and diagnostics of electronic circuits and systems | 2013

Efficiency of oscillation-based BIST in 90nm CMOS active analog filters

Daniel Arbet; Gabriel Nagy; Viera Stopjakova; Gábor Gyepes

Research presented in this paper is aimed at the comparison of the Oscillation-based Built-In Self Test (OBIST) efficiency in covering catastrophic and parametric faults in active analog integrated filters designed in two different technologies. Sallen-Key topologies of low-pass and high-pass filters were used as Circuit Under Test (CUT), designed in 0.35μm and 90nm CMOS technologies. The presented oscillation test strategy uses the on-chip Schmitt oscillator as the reference frequency source to compensate the influence of process parameter variations. Achieved results show that the proposed BIST approach is fully implementable in nanoscale technologies. Finally, dependence of the fault coverage on the oscillation frequency value was investigated.


design and diagnostics of electronic circuits and systems | 2014

An approach towards selection of the oscillation frequency for oscillation test of analog ICs

Martin Kovac; Daniel Arbet; Gabriel Nagy; Viera Stopjakova

The paper deals with a new approach to selection of the optimum value of the oscillation frequency towards increasing the efficiency of the oscillation-based test methods in covering hard-detectable short faults in nanoscale technologies. For this purpose, the Describing-Function analysis was used to calculate of the oscillation frequency of a simple oscillator (an analog circuit under test) modeled in MATLAB. Accuracy of the model was evaluated through comparison of computed parameters to parameters achieved for the same circuit in Cadence.


international conference on microelectronics | 2014

A self-calibrated binary weighted DAC in 90nm CMOS technology

Daniel Arbet; Gabriel Nagy; Viera Stopjakova; Gábor Gyepes

In this paper, an on-chip self-calibrated 8-bit R-2R digital-to-analog converter (DAC) based on digitally compensated input offset of the operational amplifier (OPAMP) is presented. To improve the overall DAC performance, a digital offset cancellation method was used to compensate deviations in the input offset voltage of the OPAMP caused by process variations. The whole DAC as well as offset compensation circuitry were designed in a standard 90nm CMOS process. The achieved results show that after the self-calibration process, the improvement of 48% in the value of DAC offset error can be obtained.


Journal of Circuits, Systems, and Computers | 2016

Fully Differential Difference Amplifier for Low-Noise and Low-Distortion Applications

Daniel Arbet; Gabriel Nagy; Martin Kovac; Viera Stopjakova

In this paper, a fully differential difference amplifier (FDDA) designed in 0.35μm CMOS technology is presented. The proposed amplifier reaches high dynamic range (DR) and low input referred noise. Comparison of noise performance of the proposed FDDA to an ordinary differential amplifier has been performed. Achieved results prove that the developed amplifier circuit can be advantageously used in applications that require a fully differential signal. Then, simulation results have been verified by the measurement of prototyped chips. In our work, the proposed amplifier was experimentally employed in the analog frontend of the readout interface (RI) for a Micro-Electro-Mechanical-Systems (MEMS) capacitive microphone.


international conference radioelektronika | 2015

High dynamic range and low distortion fully differential difference amplifier in CMOS

Daniel Arbet; Martin Kovac; Gabriel Nagy; Viera Stopjakova

A fully differential difference amplifier designed in 0.35 μm standard CMOS technology is presented. The proposed topology reaches high dynamic range, low equivalent input noise and a low value of total harmonic distortion. Simulation results prove that the developed amplifier circuit can be advantageously used in high performance applications that require a fully differential signal processing.


international conference mixed design of integrated circuits and systems | 2015

Readout interface for capacitive MEMS microphone in CMOS technology

Daniel Arbet; Gabriel Nagy; Martin Kovac; Viera Stopjakova; Lukas Nagy

This paper presents the frontend part of the readout interface for a capacitive MEMS microphone designed and fabricated in 0.35 μm CMOS technology. The developed readout interface will be used in a noise dosimeter applicable in very noisy and harsh environment. The prototype chips were measured and the main parameters evaluated. The achieved results demonstrate low harmonic distortion, low noise and high dynamic range of the developed readout interface.


design and diagnostics of electronic circuits and systems | 2015

Fully Differential Difference Amplifier for Low-Noise Applications

Daniel Arbet; Gabriel Nagy; Martin Kovac; Viera Stopjakova

In this paper, a fully differential difference amplifier designed in 0.35 μm CMOS technology is presented. The proposed amplifier reaches high dynamic range and low input noise. Comparison of noise performance of the proposed fully differential difference amplifier to an ordinary differential amplifier has been performed. Simulation results prove that the developed amplifier circuit can be advantageously used in applications that require a fully differential signal. In our work, the proposed amplifier has been experimentally employed in the analog front end of the readout interface for a MEMS (Micro-Electro-Mechanical-Systems) capacitive microphone.


international conference on applied electronics | 2012

Design of rail-to-rail operational amplifier with offset cancelation in 90nm technology

Daniel Arbet; Gabriel Nagy; Gábor Gyepes; Viera Stopjakova

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Daniel Arbet

Slovak University of Technology in Bratislava

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Viera Stopjakova

Slovak University of Technology in Bratislava

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Lukas Nagy

Slovak University of Technology in Bratislava

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