Gary L. Patton

Structure and morphology of polycrystalline silicon‐single crystal silicon interfaces

Using high resolution transmission electron microscopy, morphological aspects of the polycrystalline silicon (polysilicon)‐single crystal silicon interface have been correlated to the surface treatment used prior to polysilicon deposition, and to high‐temperature annealing. Specimens which were chemically oxidized prior to the deposition exhibited a continuous layer of amorphous oxide ∼15 A thick; high‐temperature annealing results in the formation of small discontinuities in this oxide, and thus small regions of epitaxial realignment within the polysilicon layer. Specimens which were etched in HF prior to deposition were characterized by nearly oxide‐free interfaces, and, following high‐temperature annealing, exhibited regions of epitaxial realignment an order of magnitude larger than those found in the chemically oxidized samples.

Impact of processing parameters on base current in polysilicon contacted bipolar transistors

A number of models have been presented to explain the lower base current in bipolar transistors with polysilicon emitter contacts: the effects of oxides (native and chemically grown) at the polysilicon-silicon interface; dopant segregation at this interface; and minority carder transport in the polysilicon. To differentiate between these models and to determine the process sensitivity of polysilicon contacted BJTs, a series of controlled experiments correlating physical structures with electrical characteristics have been performed. We find that for anneals at low temperatures and times (e.g., 900°C/1hr) the unintentional native oxide at the polysilicon-silicon interface dominates the electrical characteristics, resulting in extremely low base currents. For higher temperature anneals or doping levels above 2×1020/cm3, the native oxide layer breaks up and epitaxial regrowth of the polysilicon layer occurs. This reduces the blocking action of the interface and allows more carriers to enter the polysilicon, increasing the base current by as much as a factor of four.

SiGe Heterojunctions Transistors and Optoelectronic Devices

SiGe alloys have been successfully applied to a number of semiconductor devices, including bipolar heterojunction transistors, field effect transistors (FETs), and optoelectronic devices and structures. This review paper will first summarize the results obtained to-date in bipolar transistors, highlighting the design flexibility and the trade-offs offered by SiGe heterojunction technology and bandgap engineering, like junction field/capacitance control, liquid nitrogen operation and complementary processes. The leverage of this technology in high speed circuits will be discussed, including the record 75 GHz fr and 60 GHz f max heterojunction bipolar transistors, the achievement of sub-25 ps ECL ring oscillator delay, and the doubling of the mobility in p-MODFETs. The applications of this technology to optoelectronic devices, including detectors and waveguides, will also be reviewed, to extend the use of silicon technology to long wavelength communication technology and infrared imaging.