Gary W. Hughes

Interface‐state effects in irradiated MOS structures

The effect that ionizing radiation has on Si‐SiO2 MOS devices is to create trapped holes and interface states at the Si‐SiO2 interface. Several recent publications claim that it is possible to distinguish donor or acceptor interface states by analyzing C‐V curves. It is shown here that in the presence of interface states it is not possible, in general, to determine either interface‐state type or the quantity of fixed oxide charge from C‐V measurements. Furthermore, observed differences between flatband voltage shifts on p‐ and n‐type MOS devices are shown to be independent of whether interface states are donors or acceptors.

Seamless splicing for MPEG-2 transport stream video servers

Current uncompressed video servers are capable of streaming multiple video clips back-to-back in such a way that they appear to be a single uninterrupted stream. This is a relatively simple process made possible by frame boundaries equally spaced with no interframe dependencies. With the adoption of MPEG-2 and DV digital television standards, the distribution of video in compressed format will become more common. This change is fueling the development of video servers capable of distributing compressed video in broadcast-ready format. The seamless concatenation and splicing of streams that has been taken for granted in the uncompressed domain becomes complex in the compressed domain due to the mechanics of video encoding. This paper describes the problems associated with concatenating MPEG-2 transport streams (TS) and a technique to perform frame accurate seamless splicing from one MPEG-2 TS to another on compressed stream video servers.

High fill-factor CCD imager with high frame-rate readout

The design for two high fill-factor CCD arrays for optical signal processing applications is described. The imaging registers have 1024 x 1024 and 512 x 512 pixels and achieve virtually 100 percent optical fill factor through the use of substrate thinning and back illumination. High frame-rate readout is obtained by the use of a dual storage register and multiple floating-diffusion output ports resulting in reduced readout frequency. On-chip correlated double sampling amplifiers are implemented to reduce the readout noise and simplify off-chip analog signal processing. Both chips include antiblooming drain structures and ESD protection circuits.

High Fill Factor Silicide Monolithic Arrays

Monolithic infrared imagers with Schottky-barrier detectors (SBDs) can be constructed with silicon VLSI technology into large and high density focal plane arrays (FPAs). This paper presents a brief review of the available Pd2Si and PtSi SBDs, of the reported SBD FPAs, and of the general consideration for the construction of high fill-factor and high-density monolithic FPAs. The four FPA multiplexer architecture reviewed are: an interline transfer CCD, a charge sweep device, a column-readout MOS, and a row-readout MOS.

HIGH FRAME RATE ELECTRONIC IMAGING

Hughes discusses high-speed imagers, their economic and technological impact as well as requirements for high- speed applications.

Performance of a high-frame-rate CCD imager

Back-illuminated, 16-port 512 X 512 and 32-port 1024 X 1024 charge coupled device (CCD) imagers have been fabricated. The measured performance of the 512 X 512 pixel chip is described, including data on quantum efficiency, dynamic range, dark current, frame rates, uniformity, contrast transfer function, and on-chip correlated double- sampling (CDS) amplifier noise. We have previously reported on these designs. The CCD arrays are designed with a unique combination of parameters optimized for applications requiring high resolution combined with high frame rates and wide dynamic range. The imaging registers achieve 100% optical fill factor and high quantum efficiency through the use of substrate thinning and back-side illumination. The high frame-rate readout is obtained by the use of a dual storage register and multiple floating-diffusion output ports which reduce the 512 X 512 array readout frequency to 15 MHz for 800 frame per second operation. On- chip CDS amplifiers are included in each output port to reduce the readout noise and simplify off-chip analog signal processing. Both designs include a buried anti-blooming drain structure and electro static discharge (ESD) protection.

High-frame-rate infrared and visible cameras for test range instrumentation

Field deployable, high frame rate camera systems have been developed to support the test and evaluation activities at the White Sands Missile Range. The infrared cameras employ a 640 by 480 format PtSi focal plane array (FPA). The visible cameras employ a 1024 by 1024 format backside illuminated CCD. The monolithic, MOS architecture of the PtSi FPA supports commandable frame rate, frame size, and integration time. The infrared cameras provide 3 - 5 micron thermal imaging in selectable modes from 30 Hz frame rate, 640 by 480 frame size, 33 ms integration time to 300 Hz frame rate, 133 by 142 frame size, 1 ms integration time. The infrared cameras employ a 500 mm, f/1.7 lens. Video outputs are 12-bit digital video and RS170 analog video with histogram-based contrast enhancement. The 1024 by 1024 format CCD has a 32-port, split-frame transfer architecture. The visible cameras exploit this architecture to provide selectable modes from 30 Hz frame rate, 1024 by 1024 frame size, 32 ms integration time to 300 Hz frame rate, 1024 by 1024 frame size (with 2:1 vertical binning), 0.5 ms integration time. The visible cameras employ a 500 mm, f/4 lens, with integration time controlled by an electro-optical shutter. Video outputs are RS170 analog video (512 by 480 pixels), and 12-bit digital video.

1024 X 1024 pixel high-frame-rate digital CCD cameras

Field deployable, high frame rate visible CCD camera systems have been developed to support the Test and Evaluation activities at the White Sands Missile Range. These visible cameras are designed around a Sarnoff 1024 X 1024 pixel, backside illuminated CCD with a 32-port, split-frame transfer architecture. The cameras exploit this architecture to provide selectable modes from a 30 Hz frame rate at 1024 X 1024 pixels to a 300 Hz frame rate with 1024 X 512 pixels (2:1 vertical binning). The cameras are configured with a 500 mm, f/4 lens, and a Ferro-electric liquid crystal electro-optic shutter, to provide variable integration times from 0.5 to 32 msec. Video outputs provided are RS170 analog video in a reduced 512 X 480 pixel format, and 12-bit full resolution digital video data stream provided through a high speed serial/parallel digital coaxial interface. At a frame rate of 300 frames per second, these cameras deliver video data at an average rate of 1.9 Gbits/sec, and a burst rate of 2.8 Gbits/sec, with the capability of reaching an average 12 bit digital data rate of 3.8 Gbits/sec when higher frame rate imagers become available.

High Sensitivity Charge-Coupled Device (CCD) Imagers For Television

In this paper we report on new, fully manufacturable, high sensitivity frame-transfer-type charge coupled device (CCD) image sensors developed for high performance television applications including low light level surveillance and color broadcast cameras. A novel feature of these charge coupled device (CCD) imagers is a thinned configuration which allows illumination from the backside of the device, providing very high quantum efficiency in excess of 60% over the entire visible spectrum for the whole imager area with anti-blooming drains. This high quantum efficiency, together with the very low noise charge coupled device (CCD) read-out capability of less than 35 electrons root mean square (rms) per pixel provides outstanding low-light-level camera performance.

Stable vacuum UV CCD detectors designed for space flight experiments

Thinned, backside-illuminated, p-channel CCD images are under development which can exploit the surface potential in VUV applications, yielding enhanced quantum efficiency to wavelengths as short as 1100 A. The current goal is production of large-format, 5-micron pixel imagers for spectrographic and imaging VUV spaceflight experiments. Model predictions of the effect of device design on quantum efficiency, well capacity, and crosstalk are presented for such 5-micron-approaching pixel sizes.