Gerhard Klink

Wafer bonding with an adhesive coating

The assembly process for microelectromechanical systems often requires a wafer-joining process using low temperatures. In this work a bonding process investigated, which uses thin adhesive films to stack silicon wafers. The method can be extended to form patterned adhesive coatings using stamping technique. Characterization of the process has been carried out with respect to adhesion, hermeticity and chemical stability of the adhesive bond. In several applications this adhesive bonding process has been successfully applied to assemble sensors and actuators.

Innovative packaging concepts for ultra thin integrated circuits

The increasing demand on miniaturized and flat packaging technologies is driven by the trend towards small and portable electronic systems. Due to the requirements of modern Ball Grid Arrays, Smart Cards or Chip Size Packages thickness of integrated circuits has been reduced considerably compared with original wafer thickness. Driven by this evolution, the Fraunhofer Institute for Reliability and Microintegration has advanced its wafer thinning technology down to a residual silicon thickness of 20 /spl mu/m and below. Because of low height, low topography of assembled chips and mechanical flexibility, these chips are ideal for integration in thin and bendable systems or vertically stacked systems. The advantages of thin ICs open a large field of new and interesting applications in microelectronics. However wafer thinning has its impact on subsequent assembly process. Dicing, handling, mounting and interconnection processes of thin ICs has to fulfil particular requirements, but also offers new and innovative solutions. These are investigated and discussed in this paper.

Genotyping of single nucleotide polymorphisms by melting curve analysis using thin film semi-transparent heaters integrated in a lab-on-foil system

The recent technological advances in micro/nanotechnology present new opportunities to combine microfluidics with microarray technology for the development of small, sensitive, single-use, point-of-care molecular diagnostic devices. As such, the integration of microarray and plastic microfluidic systems is an attractive low-cost alternative to glass based microarray systems. This paper presents the integration of a DNA microarray and an all-polymer microfluidic foil system with integrated thin film heaters, which demonstrate DNA analysis based on melting curve analysis (MCA). A novel micro-heater concept using semi-transparent copper heaters manufactured by roll-to-roll and lift-off on polyethylene naphthalate (PEN) foil has been developed. Using a mesh structure, heater surfaces have been realized in only one single metallization step, providing more efficient and homogenous heating characteristics than conventional meander heaters. A robust DNA microarray spotting protocol was adapted on Parylene C coated heater-foils, using co-polymer poly(DMA-NAS-MAPS) to enable covalent immobilization of DNA. The heaters were integrated in a microfluidic channel using lamination foils and MCA of the spotted DNA duplexes showed single based discrimination of mismatched over matched target DNA-probes. Finally, as a proof of principle, we perform MCA on PCR products to detect the Leu7Pro polymorphism of the neutropeptide Y related to increased risk of Type II diabetes, BMI and depression.

Simultaneous fabrication of dielectric and electric joints by wafer bonding

Wafer bonding is a key technology for the fabrication of micro mechanical systems which consist of two or more stacked silicon parts. Among the different bonding methods anodic bonding with an intermediate layer of Pyrex glass offers several advantages concerning the process flexibility and the stability of the bond. To use this technology the sputter deposition process of Pyrex glass was optimized and the anodic bonding process was characterized. A process for a capacitive pressure sensor was designed which included bond frames made out of sputtered glass. The electrical contact from both electrodes to contact pads was realized by lateral and vertical feedthroughs. The latter were obtained by an Au-Au thermocompression bond which was simultaneously fabricated with the anodic bond.

Studies of fine pitch patterning by reel-to-reel processes for flexible electronic systems

Cost effective and high quality processes are needed for further development of flexible electronic systems. Applications of these structures are e. g. in the field of high density interconnection foils or polymer electronics. In this paper a lithography process for patterning copper on flexible foils using reel-to-reel methods is presented. The process allows the fabrication of well defined copper structures with typical feature sizes from 15 to 40 /spl mu/m using either etching or electroplating technology. Properties of the dry film photoresist used in the process as well as details of the technology are described. Influences of photolithography and etching on dimensional accuracy and resolution are given and some consequences on design rules are shown.

Reel-to-Reel Fabrication of Integrated Circuits Based on Soluble Polymer Semiconductor

Rapid progress in the field of organic semiconductors makes the vision of plastic integrated circuits reachable. Polymer electronic is expected to be a promising technology for low-cost and large-area electronic systems, which can not be addressed by traditional chip technology. Solutions of polymer or polymer based pastes offer advantages due to their easy processing possibilities which give the opportunity to coat and pattern them like a printing ink. Cost requirements of polymer electronic imply that for manufacturing also very cost-effective processes must be used. Hence reel-to-reel manufacturing with endless substrates of foil is a key technology to fulfill the challenging cost demands of cheap flexible systems. Within this work a process for manufacturing integrated circuits based on solution processed polymer semiconductors has been developed. Basis is a reel-to-reel working photolithographic patterning process for metallized foils, which is used to fabricate the basic source-drain layer with high resolution. By two subsequent lacquering and three screen printing steps polymer field effect transistors are integrated to circuits.

Micro-contact printing of OTFT on polymer foils

In the emerging field of large area electronics polymer foil substrates play a key role in large area and flexible electronic, illumination and display systems. Compared to silicon, however, coatings on polymer substrates and in particular foils are challenging to pattern on a scale below 10 µm due to surface roughness and surface defects caused by industrial manufacturing processes.

Multifunctional system integration in flexible substrates

In this paper we present a technology developed for reliable electrical interconnection on film substrates and between vertically stacked film layers. Applying through-hole via technologies for 3D foil stacks enables multi-functionality and RF performance combined with open form-factor and very cost-efficient manufacturing of conformable electronic modules. The manufacture of fine line metal patterns (line /space geometries below 20μm) on film substrates is performed by cost-effective roll-to-roll technology. Furthermore procedures and technologies for handling and lamination of film based sub-modules have been developed. Also the manufacture and handling of ultra-thin and flexible integrated circuits has been combined with placement of SMD type passive and with integrated printed passive components in the same technology.

Large Area Cost-Efficient Electronics Systems Integration

Polymer electronic is expected to be a promising technology for low-cost and large-area electronic systems to support information and communication technology, sensor networks, life sciences, medical and bio-sensing devices, which can not easily be addressed by traditional chip technology. Solutions of polymer or polymer based pastes offer advantages due to their easy processing possibilities which give the opportunity to coat and pattern them like a printing ink. Hence reel-to-reel manufacturing with endless substrates of foil is a key technology to fulfil the challenging cost demands of cheap flexible systems. However printing resolution and registration as well as the electrical performance of polymer materials request at present still a hybrid approach based on most-polymer materials and partially-printed technologies to reach reasonable performance of systems. The process integration presented is based on a photolithographic process for the first level based on metallized foils, which is used to pattern the first interconnect and electrode layer with low resistance and high resolution compared to printing. With two subsequent lacquering and three screen printing steps for example polymer field effect transistors as well as sensors and actuators are integrated to circuits. Moreover this approach enables the possibility to use such functional flexible foil substrates for the hetero-integration of cost-efficient systems merging thin silicon chips with further thin, flexible or printed electronic components, sensors actuators batteries displays and even micro-fluidics and -pneumatics on a foil substrate. This paper prevents an overview over the hybride heterointegration approach for flexible electronic foil systems so-called polytronics developed at Fraunhofer IZM [1,2].

Fast flip chip assembly for reel-to-reel manufacturing

For low-cost applications like smart labels, a mounting technology, which allows high throughput is necessary. Therefore, such products are fabricated reel-to-reel on flexible substrates. With this technology, cheap substrate materials can be used and substrate handling is reduced to a minimum, but to achieve fast production cycles it is important to establish rapid and efficient mounting technologies. Flip chip assembly using anisotropic conductive adhesive (ACA) offers an inexpensive method interconnecting many contacts simultaneously, but mounting speed is limited by the fact that a defined pressure has to be maintained during curing. For chips with only a few contacts, alternative methods which allow higher throughput are investigated.