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Latest external collaboration on country level. Dive into details by clicking on the dots.

Hotspot


Dive into the research topics where Giorgio Viero is active.

Publication


Featured researches published by Giorgio Viero.


Archive | 2003

Coaxial via structure for optimizing signal transmission in multiple layer electronic device carriers

Stefano S. Oggioni; Gianluca Rogiani; Mauro Spreafico; Giorgio Viero


Archive | 2003

OPTIMIZED CONDUCTIVE LID MOUNTING FOR INTEGRATED CIRCUIT CHIP CARRIERS

Michael A. Gaynes; Stefano Oggioni; Giorgio Viero


Archive | 2003

Structure of stacked vias in multiple layer electronic device carriers

Stefano Oggioni; Michele Castriotta; Gianluca Rogiani; Mauro Spreafico; Giorgio Viero


Archive | 2006

POWER SUPPLY STRUCTURE FOR HIGH POWER CIRCUIT PACKAGES

Michele Castriotta; Stefano S. Oggioni; Mauro Spreafico; Giorgio Viero


Archive | 2005

OPTIMIZED PLATING PROCESS FOR MULTILAYER PRINTED CIRCUIT BOARDS HAVING EDGE CONNECTORS

Stefano Oggioni; Giorgio Viero


Archive | 2005

HANDLING AND POSITIONING OF METALLIC PLATED BALLS FOR SOCKET APPLICATION IN BALL GRID ARRAY PACKAGES

Giorgio Viero; Stefano S. Oggioni; Michele Castriotta


Archive | 2005

METALLIC PLATING FOR SOCKET APPLICATIONIN BALL GRID ARRAY PACKAGES

Giorgio Viero; Stefano S. Oggioni; Michele Castriotta


Archive | 2003

Improved structure of stacked vias in multiple layer electronic device carriers

Michele Castriotta; Stefano Oggioni; Gianluca Rogiani; Mauro Spreafico; Giorgio Viero


Archive | 2005

Metallic plating for socket application in ball grid array packages

Giorgio Viero; Stefano Oggioni; Michele Castriotta


Archive | 2003

Verbesserte struktur gestapelter kontaktlöcher in mehrschichtigen elektronischen bauelementeträgern Improved structure of stacked contact holes in multilayer electronic devices makers

Michele Castriotta; Stefano Oggioni; Gianluca Rogiani; Mauro Spreafico; Giorgio Viero

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