Girish Anant Dixit

Reactively sputtered titanium nitride films for submicron contact barrier metallization

Titanium nitride (TiN) is widely used as a barrier metal for submicron metallization because of its superior thermal stability. Various methods of forming TiN films have been explored. Oxygen passivation of the grain boundaries of the TiN and stoichiometry of the TiN are reported to be the dominant factors in achieving good barrier properties. We report on the structure property correlation of the TiN barrier metal films.Titanium nitride (TiN) is widely used as a barrier metal for submicron metallization because of its superior thermal stability. Various methods of forming TiN films have been explored. Oxygen passivation of the grain boundaries of the TiN and stoichiometry of the TiN are reported to be the dominant factors in achieving good barrier properties. We report on the structure property correlation of the TiN barrier metal films.

Planarized aluminum metallization for sub-0.5 mu m CMOS technology

The authors describe an aluminum sputter process, called the Al-plug process, which results in complete filling of submicron contacts and vias of various sizes. The process can be done in a conventional sputtering system. Material and electrical characterization of the film and the implementation of this process in submicron integrated circuits are presented.<<ETX>>

Bicrystal studies of diffusion-induced grain boundary migration in Cu/Zn

In this article, we present results of systematic studies of the effects of grain boundary parameters upon diffusion-induced grain boundary migration (DIGM). It is shown that grain boundary velocity, solute penetration depth, concentration of deposited solute, and activation energy are all strongly and reproducibly dependent upon the grain boundary parameters. The effects are also somewhat different in the cases of symmetrical and asymmetrical boundaries, indicating the importance of the boundary inclination. It is shown that the observed differences can be rationalized in terms of the variations of the driving force for DIGM and the grain boundary mobility.

Transmission electron microscopy characterization of defects resulting from the polycrystalline silicon buffered local oxidation of silicon isolation process

Polybuffered LOCOS is used for isolation of active devices in submicron integrated circuits. Many papers have reported on the defects resulting from this process. We report, for the first time, on the structure and composition of these defects and relate the defects to a phenomenon similar to the traditional Kooi effect [E. Kooi, J. G. van Lierop, and J. A. Apples, J. Electrochem. Soc. 123, 1117 (1976)].

Reliability study of planarized aluminum metallization

This work investigates the reliability issues associated with an aluminum process, called the Al-plug process, that results in the complete filling of submicron contacts and vias. It has been demonstrated that the Al-plug process is a viable means of filling high aspect ratio vias and contacts for submicron geometries and can be used without degrading device reliability. It also has been experimentally determined that the films microstructural parameters such as surface roughness, grain size, Si nodules and hillock formation are improved over the conventionally deposited Al-Si-Cu film. Both electromigration and stress-induced migration data also indicate that the Al-plug metal film is highly reliable. The planarity of the Al-Si-Cu lines in vias and over steps is excellent compared to that of a standard metal process.<<ETX>>

Al-plug stacked contact/via process for deep submicron CMOS multilayer metal technology

The authors describe stacked contact/via technology with Al-plug metallization that results in complete filling of submicron contacts and vias of various sizes. The Al-plug process can be done in a conventional sputtering system. Physical and electrical characteristics of the Al-plug process are compared with conventional W-plug process. The implementation of Al-plug technology into submicron integrated circuits is presented.<<ETX>>

Thermal Stability of Sputter Deposited Tantallum Silicide Films

Tantallum silicide films were sputter deposited from targets with different Si/Ta stoichiometries. The films were then subjected to thermal treatments. Silicon precipitation was observed on films deposited from silicon rich targets. The effects of silicon precipitates on device characteristics was studied. A method to suppress silicon precipitation is reported.