Glen T. Mori

Robust TSV via-middle and via-reveal process integration accomplished through characterization and management of sources of variation

An overview is given of developments in unit-process and process-integration technology enabling the realization of through-silicon vias (TSVs) for 3D chip stacking. TSVs are expected to increase interconnect bandwidth, reduce wire delay due to shorter vertical signal path, and improve power efficiency [1-3]. The fabrication sequences for forming TSVs in the middle of the line (via-middle approach) and for revealing them from the backside in the far back end of the line are described with detailed attention to major unit processes of etch, dielectric deposition, barrier and seed deposition, electrochemical deposition, and chemical-mechanical planarization. Unit-process advances are described in relation to the structural and functional requirements of the TSVs, and examples are given of co-optimization among the interdependent steps of the integrated sequence. Emphasis is given to copper vias of diameter 4 to 10μm with aspect ratio between 8 and 12. For both the viaformation and via-reveal sequence, it is shown how integration problems were overcome by a comprehensive approach.

Correlation between aluminum alloy sputtering target metallurgical characteristics, arc initiation, and in-film defect intensity

Increasing levels of metallization, shrinking device geometries, and stringent defect density requirements have led to a continuous focus in the semiconductor manufacturing community to reduce defects generated during metal deposition by PVD techniques. Of particular interest in the metallization community is the reduction in in-film defect density in sputtered aluminum films. Pareto analysis of in-film defects in currently used interconnect metallization schemes suggest that a considerable portion of the in-film defects (up to 50%) are caused by unipolar arcing during aluminum deposition. Due to their unusual molten appearance, these defects are commonly referred to as splats. These defects can be as large as 500 micrometers , and due to their frequency of occurrence and size can significantly impact device yield in a manufacturing environment. Systematic investigations have revealed that the formation of splats, due to unipolar arcing, can be strongly correlated to the metallurgy of the aluminum alloy targets used during aluminum sputter deposition. The presence of undesirable metallurgical attributes such as alumina inclusions, porosity, oxygen content etc. are the primary causes for the occurrence of unipolar arcing. These undesirable metallurgical attributes appear to be the result of the manufacturing processes used to manufacture the aluminum alloy targets. The results of this study indicate that significant improvement in defect generation due to unipolar arcing during sputter deposition of aluminum films, and hence an improvement in device yield, is possible by reduction/elimination of the various undesirable metallurgical attributes in the aluminum alloy targets.