Guannan Wang

A control and readout circuit with capacitive mismatch auto-compensation for MEMS vibratory gyroscope

In this paper, a control and readout circuit for MEMS vibratory gyroscope is described, including closed- loop driving axis and open-loop sensing axis. Capacitive mismatch auto-compensation has been implemented in this system to suppress the influence to the output due to the mismatch of gyroscope capacitors. The ASIC is fabricated in a 0.35um CMOS process. The test of the ASIC is performed with a MEMS vibratory gyroscope. The test result shows that the non-linearity is less than 0.1% within angular velocity range of -300°/s to 300°/s.

A high-voltage interface circuit for MEMS vibratory gyroscope

In this paper, a high-voltage interface circuit has been designed and implemented for MEMS gyroscope. Continuous-time charge sensitive amplifier with chopping stabilization technique is used in the conversion stage to achieve low noise performance. A closed driving loop for MEMS gyroscope which applying multiple supply voltages is presented. The chip is fabricated in a 0.35um 5V/12V high-voltage process. The test of the chip is performed with a MEMS vibratory gyroscope. The result shows that the driving output of the ASIC can ensure a stable oscillation in the driving axis.

A low power high speed readout circuit for 320×320 IRFPA

A low power high speed Readout Integrated Circuit(ROIC) design for 320 × 320 IRFPA is proposed in this paper. The ROIC operates as follows: after integration phase, voltages on column bus of odd rows and even rows are read out alternately. And the results are sampled and stored alternately on two sample capacitors added at the output point of column CSA. When sample capacitor for odd row samples and holds data, sample capacitor for even row works as feedback capacitor of output buffer so that voltage stored on sample capacitor can be read out directly. In this design, each column has one low power charge amplifier, and output buffers power is optimized. Besides, capacitance of sample capacitor is much larger than that of CSAs feedback capacitor, so the KTC noise is lower and the charge injection is suppressed while the output range is not impaired. This design is also applicable to window readout. The readout speed can reach 8MHz with power consumption lower than 50mW. A 320 × 320 ROIC with pixel size of 30 × 30 µm2 has been designed and fabricated with a 0.35 µm DPTM CMOS process under 5v supply voltage.

A low-noise interface circuit for MEMS vibratory gyroscope

A CMOS ASIC has been designed and implemented for readout and control of MEMS vibratory gyroscopes. A low noise design is achieved by using the technique of sinusoidal chopper stabilization with a chopping frequency of 2MHz, which will effectively suppress the low frequency noise. A closed loop control method in driving mode is presented. The Chip is fabricated in a 0.35µm standard CMOS process with an area of 2.5×2.5mm2. The test is performed with a vibratory gyroscope on the condition of closed-loop control, and the measurement result shows a detecting resolution of 6aF in 100Hz bandwidth from a single 5V supply.

A LOW-NOISE HIGH-VOLTAGE INTERFACE CIRCUIT FOR CAPACITIVE MEMS GYROSCOPE

This paper presents a high-voltage control and readout interface circuit implemented for capacitive Micro-Electro-Mechanic System (MEMS) gyroscope. A charge sensitive amplifier (CSA) with chopper technique is used to accomplish low-noise capacitive sensing. The stabilization of the closed drive loop is maintained by an auto gain controller (AGC) and an adjustable phase shifter. The outputs of the ASIC directly drive the gyroscope after buffered by an on-chip high-voltage level shifter. The chip is fabricated in a 0.35 um 5 V/12 V Bipolar, CMOS and DMOS (BCD) process. The test of the chip is performed with a MEMS vibratory gyroscope. The result shows that the Application Specific Integrated Circuit (ASIC) can ensure a stable oscillation in the drive axis, and the noise floor is 0.0015°/s/√Hz within 100 Hz.

A CAPACITIVE INTERFACE CIRCUIT WITH CAPACITOR MISMATCH AUTO-COMPENSATION FOR MEMS GYROSCOPE

In this paper, a capacitive interface circuit with capacitor mismatch auto-compensation has been designed and implemented for MEMS gyroscope. An on-chip capacitor array controlled by an 8-bit SAR logic circuit is selected to be connected in parallel with the minor one of the two differential gyroscope capacitors, making the two capacitors equal. The compensation progress takes eight periods of the clock at power-on and then will be turned off automatically. The chip is fabricated in a 0.35 μm CMOS process. The test of the chip is performed with a vibratory gyroscope on the condition of a closed-loop control in the drive mode, and the measurement shows that the minimum capacitive compensation is 3.5 fF. Within -300°/s to 300°/s of rotation rate input range, the nonlinearity is less than 0.1%.

A LOW POWER HIGH RESOLUTION ROIC DESIGN WITH 14-BIT COLUMN-LEVEL ADC FOR 384 × 288 IRFPA

A readout integrated circuit (ROIC) of infrared focal plane array (IRFPA) with low power and low noise is presented in this paper. It consists of a 384 × 288 pixel array and column-level A/D conversion circuits. The proposed system has high resolution because of the odd–even Analog to Digital Conversion (ADC) structure, containing correlated switches design, multi-Vth amplifier design and high speed high resolution comparator design including latch-stage. Designed and simulated in 0.35-μm CMOS process, this high performance ROIC achieves 81.24 dB SNR at 8.64 KS/s consuming 98 mW under 5 V voltage supply, resulting in an ENOB of 13.2-bit.

A small-area low-mismatch multi-channel constant current LED driver

This paper proposes a new structure of LED(Light-emitting diode) driver for obtaining a low mismatch output current between different channels and even reduces the chip area. Its fabricated with TSMC 0.35µm DDD process. The chip contains 16 channels and the maximum/minimum output current is 3mA/45mA, respectively. The value of each channels output current is the same and controlled by a programmable 6-bits digital input signals. The circuit uses constant gate voltage of the power MOS working in the linear region whose (Vgs — Vth) is 10 to 50 times of Vds. The advantage is no DAC(Digital-to-Analog Converter) and no complex gate voltage generating circuit. Simple gate voltage generating circuit can also adapt to a wide range of external resistance changes. Because of the lower mismatch caused by threshold voltage mismatch, it can achieve a highly matched output current. The chip has only ±1.1% mismatch between different channels. The area of each channels power MOS is only 200µm× 100µm. The area of analog part including current bias, bandgap reference, current mirror, and other control circuits is only 400µm×200µm.

Capacitor mismatch auto-compensation for MEMS gyroscope differential capacitive sensing circuit

A capacitor mismatch auto-compensation circuit has been designed and implemented for MEMS gyroscope differential capacitive sensing circuit. An in-chip capacitor array that controlled by the 7-bit SAR is selected to be connected in parallel with one of the gyroscope capacitor, making the two differential capacitors of the gyroscope equal. The compensation progress only takes eight periods of the clock at the start and will be turned off afterward automatically. The chip is fabricated in a 0.35um CMOS process. The test of the chip is performed with a vibratory gyroscope on the condition of a closed-loop control in the drive mode, and the measurement shows that the minimum capacitive compensation is 3.5fF.

A 14-bit two-segment column-level ADC for remote sensing imaging

This paper proposes a 14-bit two-segment column-level ADC which is applied for remote sensing imaging system. The first segment accomplishes 6-bit coarse conversion by charge redistribution structure while the second segment uses a ramp to obtain the 8-bit fine conversion. Both segments adopt single-slope algorithm and the joint of two segments is well designed to avoid code missing or overlap, so the monotonicity is excellent. Segmentation and pre-judgment of MSB decrease the clock frequency of counter, which reduces the dynamic power dissipation and relieves the requirement of comparators speed. A 64×64 demo circuit is designed and fabricated in 0.35μm process. Simulation results reveal the average power of single column-level ADC is 160μW and SNR is 81.68dB.