Gusztav Hantos

Thermally enhanced FOWLP-development of a Power-eWLB demonstrator

Current Fan Out Wafer Level Packaging (FOWLP) technology, eWLB, has limited heat dissipation capability, as the materials used in, namely the epoxy mold compound (EMC), originally aimed process ability and mechanical stability, but not heat conduction. As eWLB technology expands to WLSiP (Wafer Level System-in-Package) for very high system integration density, combining multiple chips and different components in the same package, the thermal performance becomes a critical factor. In a broader scope, the improvement of its heat dissipation capabilities opens eWLB technology platform also to power applications.

Thermal transient characterization of semiconductor devices with multiple heat sources-Fundamentals for a new thermal standard

The thermal performance of semiconductor devices is most often specified according to JEDEC standards JESD51 1-14 which describe precisely how various steady-state thermal metrics are to be measured. Most of these metrics represent a thermal resistance between the junction of a semiconductor and some reference; e.g. Rth-JA (Junction-to-ambient), Rth-JB (Junction-to-board), or Rth-JC (Junction-to-case). However all of the above thermal metrics characterize the steady-state behaviour and have been designed for semiconductors with a single heat source only. While the extension of a stationary thermal resistance Rth-JX to the corresponding transient thermal impedance Zth-JX is straightforward the adaptation of existing standards for the characterization of devices with multiple heat sources is far less obvious. This publication gives an overview on the theoretical framework which allows extending the existing thermal metrics in a compliant way.

Failure prediction of IGBT modules based on power cycling tests

This article describes a possible method to assess the long-time behaviour of IGBT modules using the combination of power cycles to stress the devices and thermal transient testing to monitor possible die-attach degradation. The failure of an IGBT module is a complex phenomenon; it consists of thermal, electrical and thermo-mechanical effects. After a theoretical overview of the possible mechanisms, a detailed description on the structure of selected IGBT module and the power cycling parameters is given. To better understand the temperature distribution on the device and the reason of the failure after the cycling, the module was opened up, inspected visually and an equivalent thermal model was built and calibrated to the physical test results. Failure mechanisms such as die attach resistance increase, wire bond cracking and gate oxide degradation were detected.

Thermal characterization of multichip structures

The advances in electronic packaging made it possible to encapsulate several independent semiconductor dice into a single package. In the last decade many packaging configurations are realized which range from the multichip modules to the 3D stack-die structures. Thermal aware design of such structures become complex, though. To understand the thermal behavior of multichip structure containing multiple dissipating elements placed on different dice, the couplings between individual dice have to be characterized. To determine their thermal transfer impedance matrix (TTIM) is a practical way to describe the thermal relations. In this paper we demonstrate the method utilized for TTIM measurements and also show how thermal surroundings (e.g. the PCB the chip is mounted on) affect the thermal relations inside the package. In addition, the temperature dependent non-linearity of the TTIMs is also described.

In situ thermal reliability testing methodology for novel thermal interface materials

A novel in situ reliability testing method and the prototype of an industrially applicable automated system (the Viking Reliability Tester) was described in this paper for the characterization of TIM aging effects in semiconductor devices. The introduced reliability testing hardware-software framework utilizes Mentor Graphics T3Ster thermal transient tester to analyze the stress-induced deviations in the heat flow path from the pre-stress reference results. Measurement results collected during the active or passive cycling of the DUTs at regular intervals serve as basis for the comparison. The details of the degradation process can be used as input for life-time prediction and for physics of failure modeling. The practical application of the concept was demonstrated on power LEDs, including details about pre-stress measurement results and aging test-plan.

Embedded multi-domain LED model for adaptive dimming of streetlighting luminaires

Temperature dependence of solid state lighting products is often not considered. Lighting products are designed either to be too robust to fulfil the requirements under any possible environmental conditions, or fail to perform the minimal expectations due to high ambient temperature. However, temperature dependent nature of LEDs even could be a new benefit, taking it into account in the design stage. Keeping the light output values at the desired level at any ambient temperature would be a cost efficient solution. This paper shows power saving effects of a smart adaptive system using a controlled current source and describes a method to gain the controlling functions. A case study with real meteorological temperature dataset is carried out.

Fabrication, performance and reliability of a thermally enhanced wafer level fan out demonstrator with integrated heatsink

The leading Fan-Out Wafer-Level Packaging technology, WLFO by NANIUM, stemmed from Infineons embedded Wafer-Level BGA (eWLB) technology, has limited heat dissipation capability, as the materials used in, namely the epoxy mold compound (EMC), originally aimed process ability and mechanical stability, but not heat conduction. As WLFO technology expands to WLSiP (Wafer-Level System-in-Package) for very high-density system integration, the thermal performance becomes a critical factor. In a broader scope, improving heat dissipation capabilities opens WLFO technology platform to power applications. The main challenge for power dissipation on WLSiP packaging is that the EMC must be electrical insulator, placing challenges on both heat conduction and bonding to metallic heat spreader. Whereas mold compounds are typically organic resins filled with inorganic fillers, high performance thermal interface material (TIM) are designed for metal-metal interfaces, not for organic-metal interface as required for chip backside overmolded WLFO package. Another challenge is the assembly of an integrated heatsink, over and larger than the package, on a volume manufacturing capable process, to yield both good thermal conduction and reliable thermomechanical bonding. The work done is part of the collaborative European FP7-ICT project NANOTHERM (Innovative Nano and Micro Technologies for Advanced Thermo and Mechanical Interfaces), together with a consortium of leading IDM, OEM, OSAT, material suppliers and academic/institutes.

Aging tendencies of power MOSFETs — A reliability testing method combined with thermal performance monitoring

Die attach degradation in power electronic devices is a common failure mode besides bond wire damage. This paper describes the chip and packaging level effects of high cycle count power cycling on novel mid-power automotive MOSFETs. The related investigation is carried out in controlled ambient conditions. The thermal transient measurements during the active temperature cycling reliability test were evaluated along with K-factor calibration to identify different failure modes. The described measurement method gives the opportunity to distinguish between electrical and thermal related structural error modes. The newly developed thermal interface used in the DUTs was found to withstand the 150 °C thermal amplitude well beyond 100,000 cycles without fatal failures. The thermal performance degradation was less than 28.5% after 70,000 cycles for the complete assembly.

Comparison of two alternative junction temperature setting methods aimed for thermal and optical testing of high power LEDs

Characterization of LEDs and other semiconductor devices demands at least accurate monitoring of the junction temperature (Tj), also its control in more complex cases. In practical LED lighting appliances “hot lumens” are meaningful, as most lamps are used in steady state with power applied. Analysis in cold state provides only indirect information about the intended operation. On the other hand, direct Tj measurement is not trivial — the most viable way is to measure the forward voltage (VF) which is a function of junction temperature. In this paper we compare two ways of VF-based Tj regulation of LEDs capable for electrical-optical-thermal characterization in a single session in terms of accuracy and time consumption.

Cost-efficient in-situ end-of-life prognostics of power dies and LEDs by junction temperature measurement

Lifetime (or health) monitoring in modern power electronics & luminaries continuously gains in importance, especially if safety-relevant applications are in the focus. Moreover, technology development of such devices requires fast and if possible continuous assessment of structural integrity. This work proposes a simplification of transient thermal testing (TTA) of LEDs by condensing measurement data analysis into one characteristic value to be stored and compared to successive or previous measurements for damage evaluation. Our custom-built in-situ monitoring system is based on microcontroller (uC) functionalities and can be used as stand-alone solution for reliability testing without any other electronic equipment. For quantitative assessment of measurement system performance we used Luxeon Z LEDs with different thermal interface materials. Pre-calibrated samples were inspected for structural integrity before and after cycling tests by X-Ray inspection. Measurement concept as detection for failure at thermal interface or die attach was qualitatively proven by correlation with structure function evaluation.