H. H. Hsu

Characteristics of Cerium Oxide for Metal–Insulator–Metal Capacitors

In this article, we describe our successful fabrication of a CeO 2 metal-insulator-metal (MIM) capacitor with a low voltage nonlinearity. A low leakage current of 3.9 × 10 -7 A/cm 2 at -1 V and a small VCC-α ∼ 421 ppm/V 2 were obtained at a high 10.8 fF/μm 2 density for a Pt/CeO 2 /TaN MIM capacitor. The small VCC-α for a 15 nm thick CeO 2 dielectric (κ ∼ 20) was much better than the reported dielectrics of HfO 2 , Tb-HfO 2 , and Al 2 O 3 -HfO 2 at a similar κ-value (15-20). The good analog performance was due to the combined effect of the CeO 2 dielectric and the high work-function metals.

High holding voltage segmentation stacking silicon-controlled-rectifier structure with field implant as body ties blocking layer

High electrostatic discharge (ESD) protection robustness and good transient-induced latchup immunity are two important issues for high voltage integrate circuit application. In this study, we report a high-voltage-n-type-field (HVNF) implantation to act as the body ties blocking layer in segmented topology silicon-controlled-rectifier (SCR) structure in 0.11 µm 32 V high voltage process. This body ties blocking layer eliminate the elevated triggered voltage in segmented technique. Using a large resistance as shunt resistor in resistor assisted triggered SCRs stacking structure, the double snapback phenomenon is eliminate. The series SCR could be decoupled a sufficient voltage drop to turned-on when a very low current flow through the shunt resistor. The holding voltage and the failure current of 22 V and 3.4 A are achieved in the best condition of segmented topology SCR stacking structure, respectively. It improves the latchup immunity at high voltage ICs application. On the other hand, the triggered voltage almost keep the same value which is identical to SCR single cell without using segmented topology.

Fast Low-Temperature Plasma Process for the Application of Flexible Tin-Oxide-Channel Thin Film Transistors

In this study, we demonstrated a <italic>p</italic>-type and <italic>n</italic>-type SnO TFTs on flexible polyimide substrate. The fabricated <italic>p</italic>-type SnO TFT showed a high <inline-formula><tex-math notation=LaTeX>

Investigation of Double-Snapback Characteristic in Resistor-Triggered SCRs Stacking Structure

I_{rm on}/ I_{rm off}

High mobility InGaZnO thin film transistor using narrow-bandgap titanium-oxide semiconductor as channel capping layer

</tex-math></inline-formula> of <inline-formula><tex-math notation=LaTeX>

High performance IGZO/TiO2 thin film transistors using Y2O3 buffer layers on polycarbonate substrate

text{5.7}, times ,text{10}^{5}

Low-voltage InGaZnO thin film transistors with small sub-threshold swing

</tex-math></inline-formula> and a high <inline-formula><tex-math notation=LaTeX>

The Role of Oxygen Vacancies on Switching Characteristics of TiO(x) Resistive Memories.

mu _{{rm{FE}}}

Bipolar switching characteristics of low-power Geo resistive memory

</tex-math></inline-formula> of <inline-formula><tex-math notation=LaTeX>

Interface engineering of ferroelectric negative capacitance FET for hysteresis-free switch and reliability improvement

{text{10.7 cm}}^{2},{text{V}}^{-1},{text{s}}^{-1}