H.Yanai

Computer-aided analysis of GaAs n-i-n structures with a heavily compensated i-layer

Current-voltage characteristics and space-charge distributions in an n-i-n structure have been numerically analyzed and compared with Lamperts theory. It is found that an effective resistivity in the low-voltage region depends on acceptor and trap densities and the length of an i-layer. The analytical model has been presented to estimate the effective resistivity and the onset voltage for current rise. The back-gating effect also has been analyzed in terms of a separation distance between devices and an acceptor density. To achieve a good isolation between two devices in GaAs ICs, it is suggested that a shallow acceptor density as well as a trap density must be larger than a critical value.

Numerical simulation of GaAs MESFET's on the semi-insulting substrate compensated by deep traps

Numerical simulations of GaAs MESFETs are performed in which impurity compensation by deep traps in the semi-insulting substrate is considered. It is found that the higher acceptor density in the substrate results in lower device current due to the formation of a space-charge layer at the channel-substrate interface. It is also found that the drain currents increase continuously with the drain voltage because electrons are injected to fill the traps in the substrate and a current path through the substrate is formed. This substrate current becomes remarkable for shorter gate-length MESFETs on a substrate with lower acceptor and trap densities. It is suggested that, to minimize short-channel effects in GaAs MESFETs, the acceptor density as well as the trap density in the semi-insulating substrate must be high. >

Numerical simulation of AlGaAs/GaAs heterojunction bipolar transistors with various collector parameters

Numerical simulations of AlGaAs/GaAs HBTs (heterojunction bipolar transistors) with various collector parameters are carried out to investigate the cutoff frequency characteristics, using the conventional static model and the energy transport model. It is shown that the transit time in the collector depletion layer is an intrinsically more important factor than the collector charging time. Therefore, a thinner n/sup -/-layer with higher doping density is desirable to achieve higher cutoff frequency, f/sub T/. It is found that the importance of energy transport effects arises from the fact that the actual electron energy deviates strongly from the field determined energy. The velocity overshoot can occur in a graded bandgap base and in the collector depletion layer, resulting in much higher f/sub T/ than that predicted by the conventional model. A value of F/sub T/ higher than 140 GHz is expected for an HBT with an n/sup -/-layer thickness of 1000 AA. >

Two-dimensional simulation of GaAs MESFETs with deep acceptors in the semi-insulating substrate

Abstract Numerical simulations of GaAs MESFETs with deep chromium acceptors in the semi-insulating substrate were made. The results were compared with those obtained for a case with deep donors such as EL2 centers and shallow acceptors. It was found that an acceptor density in the substrate is a predominant factor in determining current-voltage characteristics of GaAs MESFETs, whether the acceptor is deep or shallow. Potential profiles were, however, found to depend strongly on the nature of deep levels in the substrate, suggesting that different drain breakdown characteristics or different backgating effects may be observed between the two cases. To minimize short-channel effects in GaAs MESFETs, the substrate conduction must be reduced. For this purpose, the deep-acceptor density in the semi-insulating substrate should be made high.

Numerical simulation of GaAs MESFETs with a p-buffer layer on a semi-insulating substrate compensated by deep traps

A numerical analysis of GaAs MESFETs with a p-buffer layer on a semi-insulating substrate is performed in which impurity compensation by traps in the substrate is considered. It is shown that the use of a thick p-buffer layer results in a lower device current due to the formation of a steep barrier at the channel-substrate interface. It is also shown that with higher trap and acceptor densities in the substrate, the drain current is reduced due to the decrease in the substrate current. This decrease occurs because a negative-space-charge layer is formed in the substrate. It is demonstrated that when the p-buffer layer is fully depleted, its acceptors play the same electrical role as the acceptors within the space-charge region of the semi-insulating substrate. Thus, using a thick p-buffer layer has the same effect as using a substrate with a high density of traps, i.e. it minimizes the short-channel effects in GaAs MESFETs. Therefore, if the trap density in the substrate is low, the short-channel effects can be reduced by introducing a p-buffer layer or a buried p-layer. >

Simplified simulations of GaAs MESFET's with semi-insulating substrate compensated by deep levels

Current-voltage characteristics of GaAs MESFETs (with p-butter layers) on semi-insulating substrates compensated by deep levels are simulated by two-carrier and one-carrier models. For a thicker p-buffer layer or for higher acceptor density in the substrate, the drain current becomes lower because the substrate current is reduced. The one-carrier model also gives reasonable results for a case with a hole-trap substrate. Small-signal parameters of GaAs MESFETs on various types of substrates are also simulated. For a thicker p-buffer layer or for higher acceptor densities in the semi-insulating substrates, the substrate current is reduced, and both transconductance and cutoff frequency become higher. It is concluded that, to utilize the high-speed and high-frequency performance of GaAs MESFETs, acceptor densities in the substrate should be made high. >

Study on collector design of AlGaAs/GaAs heterojunction bipolar transistors by two-dimensional simulation

The cutoff frequency (f/sub T/) characteristics of NPN/sup -/n/sup +/ AlGaAs/GaAs HBTs (heterojunction bipolar transistors) with various n/sup -/ collector structures are studied by two-dimensional simulation. It is shown that the transit time in the collection depletion layer becomes a more important factor than the collector charging time in the high current region. Therefore, a thinner n/sup -/ collector layer with higher doping density is desirable for achieving higher cutoff frequency. The introduction of a semi-insulating external collector is effective in improving cutoff frequency characteristics in the relatively low current region. However, it is noted that it may lead to the earlier fall of cutoff frequency due to a high injection effect.<<ETX>>

Numerical Simulation Of GaAs MESFET's With Heavily Compensated Substrates

This paper describes numerical simulations of GaAs MESFETs on a semi-insulating substrate in which impurity compensation by deep traps is included. It is shown that higher acceptor density in the substrate results in lower device current due to the formation of space charge layer at the channel-substrate Interface. It is also shown that drain currents increase continuously, because electrons are injected to fill the traps in the substrate and the current path through the substrate is formed. This substrate current becomes remarkable for shorter gate-length MESFETs on a substrate with lower impurity densities. It is suggested that to minimize short-channel effects in GaAs MESFETs, impurity densities in the semi-insulating substrate must be high.