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IEEE Transactions on Microwave Theory and Techniques | 1989

Numerical simulation of GaAs MESFETs with a p-buffer layer on a semi-insulating substrate compensated by deep traps

K. Horio; Y.Fuseya Y.Fuseya; H.Kusuki H.Kusuki; H.Yanai H.Yanai

A numerical analysis of GaAs MESFETs with a p-buffer layer on a semi-insulating substrate is performed in which impurity compensation by traps in the substrate is considered. It is shown that the use of a thick p-buffer layer results in a lower device current due to the formation of a steep barrier at the channel-substrate interface. It is also shown that with higher trap and acceptor densities in the substrate, the drain current is reduced due to the decrease in the substrate current. This decrease occurs because a negative-space-charge layer is formed in the substrate. It is demonstrated that when the p-buffer layer is fully depleted, its acceptors play the same electrical role as the acceptors within the space-charge region of the semi-insulating substrate. Thus, using a thick p-buffer layer has the same effect as using a substrate with a high density of traps, i.e. it minimizes the short-channel effects in GaAs MESFETs. Therefore, if the trap density in the substrate is low, the short-channel effects can be reduced by introducing a p-buffer layer or a buried p-layer. >


IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 1991

Simplified simulations of GaAs MESFET's with semi-insulating substrate compensated by deep levels

K. Horio; Y.Fuseya Y.Fuseya; H.Kusuki H.Kusuki; H.Yanai H.Yanai

Current-voltage characteristics of GaAs MESFETs (with p-butter layers) on semi-insulating substrates compensated by deep levels are simulated by two-carrier and one-carrier models. For a thicker p-buffer layer or for higher acceptor density in the substrate, the drain current becomes lower because the substrate current is reduced. The one-carrier model also gives reasonable results for a case with a hole-trap substrate. Small-signal parameters of GaAs MESFETs on various types of substrates are also simulated. For a thicker p-buffer layer or for higher acceptor densities in the semi-insulating substrates, the substrate current is reduced, and both transconductance and cutoff frequency become higher. It is concluded that, to utilize the high-speed and high-frequency performance of GaAs MESFETs, acceptor densities in the substrate should be made high. >


IEEE Transactions on Electron Devices | 1994

Two-dimensional simulations of drain-current transients in GaAs MESFET's with semi-insulating substrates compensated by deep levels

K. Horio; Y.Fuseya Y.Fuseya


IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 1990

Simplified Simulation Of Gaas Mesfets With Semi-insulating Substrates Compensated By Deep Levels

K. Horio; Y.Fuseya Y.Fuseya; H.Kusuki H.Kusuki; H.Yanai H.Yanai


Proceedings of International Symposium on Signals, Systems and Electronics(ISSSE’92), Paris, France | 1992

Two-Dimensional Transient Simulations of GaAs MESFETs with Semi-insulating Substrates Compensated by Deep Levels

K. Horio; Y.Fuseya Y.Fuseya


Proceedings of 1992 IEEE GaAs IC Symposium, Florida, USA | 1992

Simulations of Trapping Effects in GaAs MESFETs and Requirements for Substrates in GaAs MESFET-ICs

K. Horio; Y.Fuseya Y.Fuseya


Technical Digest of 1991 International Workshop on VLSI Process and Device Modeling, Oiso, Japan | 1991

Transient Simulations of GaAs MESFETs on Semi-insulating Substrates Compensated by Deep Levels

Y.Fuseya Y.Fuseya; K.Horio K.Horio; Kazushige Horio


IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences | 1991

Small-Signal Parameters of GaAs MESFETs as Affected by Substrate Properties -Computer Simulation-

K.Horio K.Horio; Y.Fuseya Y.Fuseya; H.Kusuki H.Kusuki; H.Yanai H.Yanai; Kazushige Horio


asia pacific microwave conference | 1990

Effects of Substrate Properties on Small-Signal Parameters of GaAs MESFET’s

K.Horio K.Horio; Y.Fuseya Y.Fuseya; H.Kusuki H.Kusuki; H.Yanai H.Yanai; K. Horio


Transactions of the Institute of Electronics and Communication Engineers of Japan. Section E | 1990

One-carrier numerical model for GaAs MESFET's (with p-buffrer layer) on the semi-insulating substrate including deep levels

K.Horio K.Horio; Y.Fuseya Y.Fuseya; H.Kusuki H.Kusuki; H.Yanai H.Yanai; K. Horio

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H.Kusuki H.Kusuki

Shibaura Institute of Technology

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H.Yanai H.Yanai

Shibaura Institute of Technology

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K. Horio

Shibaura Institute of Technology

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