Hans Mertens

SiGe:C profile optimization for low noise performance

Todays state-of-the-art SiGe BiCMOS processes show impressive high-frequency performance, with ƒT and ƒMAX exceeding 500GHz. However, SiGe can also offer significant performance gain at more moderate application frequencies. In this paper we discuss the optimization of SiGe heterojunction bipolar transistors (HBTs) for very low noise applications in the 2–10GHz range. By careful tuning of the base-profile, minimum noise figures below 0.55dB and 0.35dB are obtained at 10GHz and 2GHz respectively.

Virtual technology for RF process and device development

The increasing complexity of modern technologies has made semiconductor process and device development challenging. A reduction in the number of experimental tests and a detailed internal insight opens the way to a more optimized process in a shorter time at reduced costs and development time. This has largely increased the use of virtual technology platforms for technology development and circuit optimization in e.g. RF BiCMOS applications. The capability of accurate predictions and directly linking basic technology parameters to RF circuit performance makes virtual technology a very powerful tool during RF process and device development. Commercially available technology computer-aided design (TCAD) tools are generally used during device fabrication and characterization, process optimization, and circuit design. With three examples we illustrate the evolution of the virtual technology process used for RF BiCMOS development within NXP Semiconductors. In the first two examples, we illustrate device and process optimization while in the third example we describe a new way of combining device and process optimization with circuit simulations by means of a distributed equivalent circuit. It allows to take the interaction between the intrinsic device (i.e. device doping profile) and the parasitic environment (i.e. device architecture) efficiently into account for high-frequency applications and in particular for low-noise circuits.

Extended high voltage HBTs in a high-performance BiCMOS process

An approach to integrate extended high voltage (EHV) npn SiGe heterojunction bipolar transitors (HBTs) in a high-performance BiCMOS process is presented. The EHV HBTs are based on a dedicated high-energy implanted phosphorus-doped subcollector. The epitaxially buried arsenic-doped subcollector of the conventional low-voltage (LV) and high-voltage (HV) HBTs, as well as the base-emitter configuration, which is shared between all three HBT types (i.e. LV, HV, and EHV), remains unchanged. The EHV devices that were fabricated are characterized by BVCE0 = 3.5 – 7.7 V, BVCB0 = 14 – 24 V, and peak-fT = 54 – 22 GHz. These figures of merit are tunable across the specified ranges by the subcollector implantation energy and dose. The integration of EHV HBTs in NXPs high-performance QUBiC4Xi process enables highly integrated transmitter and receiver ICs for microwave and millimeter-wave applications.

Double-polysilicon self-aligned SiGe HBT architecture based on nonselective epitaxy and polysilicon reflow

This paper describes a self-aligned SiGe heterojunction bipolar transistor (HBT) based on a standard double-polysilicon architecture and nonselective epitaxial growth (i.e. DPSA-NSEG). Emitter-base self-alignment is realized by polysilicon reflow in a hydrogen ambient after emitter window patterning. The fabricated self-aligned SiGe HBTs, with emitter widths of 0.3-0.4 μm, exhibit 20% lower base resistance and 15% higher maximum oscillation frequency fmax than non-self-aligned reference devices. The minimum noise figure of a Ku-band low-noise amplifier is reduced from 0.9 to 0.8 dB by emitter-base self-alignment.