Harold L. Hughes

Dependence of MOS Device Radiation-Sensitivity on Oxide Impurities

The role of various impurities in the thermally grown silicon dioxide films of metal-oxide-semiconductor (MOS) structures has been investigated. It has been determined that aluminum and sodium within such films strongly influence the radiation-sensitivity of the corresponding MOS devices. The results of the present investigation indicate that much of the radiation-induced positive space charge accumulated within the silicon dioxide films is directly related to the drift and accumulation of ions such as those of sodium. Ionizing radiation, as fran cobalt-60 gamna rays, liberates sodium ions, which are bonded by coulombic forces to non-bridging oxygens, and consequently, the sodium ions drift in the applied gate fields. The space charge due to the accumulation of sodium near the silicon dioxide-silicon interface then causes a perturbation in the surface properties of the silicon. The insight afforded by the above model provides a basis for the fabrication of surface-controlled devices less sensitive to radiation, as well as for the fabrication of radiation dosimeters where the converse in radiation sensitivity is desired. Utilizing appropriate dopants in the silicon dioxide films the desired radiation hardening and dosimetry objectives can be realized.

In depth analysis of opposite channel based charge injection in SOI MOSFETs and related defect creation and annihilation

Abstract Extensive PISCES simulations, incorporating non-local effects are carried out to obtain an in-depth understanding of the recently observed opposite channel based charge injection in SOI MOSFETs [1]. This charge injection is then combined with basic transistor characteristics and charge pumping current measurements to study the hot carrier degradation mechanisms in a variety of SOI MOSFETs, and clarify the separate roles played by hot electrons and holes in the degradation. It is also used as the basis for the design of a new, SOI based flash memory cell.

Hot-electron-induced degradation of front and back channels in partially and fully depleted SIMOX MOSFETs

The characteristics of the front and back channels of 1- mu m-long SIMOX MOSFETs were measured before and after various types of periods of hot-electron stress, and a comparison between the induced degradations was made. The back channel degrades much more severely than the front channel for both partially depleted and fully depleted devices. Fully depleted MOSFETs (140-nm-thick) are favorably contrasted with partially depleted ones (300-nm-thick) as to their vulnerability to hot-carrier-induced damage. Although defects are always located at and/or near the interface of the stressed channel, they may influence the properties of the opposite channel (via interface coupling) in fully depleted MOSFETs.<<ETX>>

Determining the Energy Distribution of Pulse-Radiation-Induced Charge in MOS Structures from Rapid Annealing Measurements

Activation energy distributions for the positive space charge induced in MOS structures by pulsed ionizing radiation have been calculated from shortterm, isothermal annealing data. These distributions are compared for conventional thermal oxides and oxides implanted with aluminum or sodium ions.

A Si0.7Ge0.3 strained‐layer etch stop for the generation of thin layer undoped silicon

The use of a Si0.7Ge0.3 strained layer as an etch stop in silicon‐based materials is reported. The etch rates were characterized through silicon and a 60 nm Si0.7Ge0.3 strained layer. The etch rate through undoped silicon was 17–20 nm/min, while the etch rate through the Si0.7Ge0.3 layer was 1 nm/min. After annealing the wafer to 850 °C for 30 min, transmission electron microscopy was used to show that strain in the alloy layer was only partially relieved, and that generated misfit dislocations were confined to the strained Si0.7Ge0.3 layer. The etch rate through the strained layer increased to 1.7 nm/min after this treatment, and was still perfectly functional as an etch stop.

Total Dose Hardening of Buried Insulator in Implanted Silicon-on-Insulator Structures

Total dose characteristics of the buried insulator in implanted silicon-on-insulator (SOI) substrates have been studied using MOS transistors. The threshold voltage shift of the parasitic back channel transistor, which is controlled by charge trapping in the buried insulator, is reduced by lowering the oxygen dose as well as by an additional nitrogen implant, without degrading the front channel transistor characteristics. The improvements in the radiation characteristics of the buried insulator are attributed to the decrease in the buried oxide thickness or to the presence of the interfacial oxynitride layer formed by the oxygen and nitrogen implants.

A new MOS radiation-induced charge: negative fixed interface charge

The irradiation behavior (up to approximately 1.3 Mrad (SiO/sub 2/)) of MOS capacitors (50-nm-thick dry-grown SiO/sub 2/, Al, or poly-Si gate) with or without postoxidation annealing (POA) in Ar at 1000 degrees C has been studied by conventional capacitance-voltage (C-V) analysis and thermally stimulated current techniques. The most important finding is that all of the samples processed for radiation hardness, i.e., without POA, exhibited a charge compensation effect. The radiation-induced positive oxide charge is partially compensated by a negative fixed interface charge that either lies outside the energy range accessible by C-V and similar techniques or extends spatially away from the interface into the oxide without acquiring the characteristics of a bulk oxide charge. >

Total Dose Characterizations of CMOS Devices in Oxygen Implanted Silicon-on-Insulator

The total dose characteristics of CMOS devices fabricated in oxygen implanted buried oxide silicon-on-insulator (SOI) substrates with different post-implant annealing processes are studied. The threshold voltage shift, subthreshold slope degradation and mobility degradation of front channel SOI/CMOS devices are measured to be the same as those of bulk devices processed identically. Negative substrate bias lowers the threshold voltage shift of back channel SOI transistors, while not affecting the front channel characteristics. Under present processing conditions, the radiation characteristics of front channel devices are independent of the postoxygen-implant annealing temperature. Oxygen precipitates at the silicon/buried oxide interface enhance interface state generation of the back channel devices during irradiation.

Deep states in silicon‐on‐insulator substrates prepared by oxygen implantation using current deep level transient spectroscopy

Current deep level transient spectroscopy was applied using enhancement n‐channel metal‐oxide‐semiconductor field‐effect transistors fabricated in silicon‐on‐insulator substrates (prepared by oxygen implantation) to study the deep levels existing in the substrates. The current transients are not affected by the large series resistances which affect the measurement of capacitance transients on thin films. For the transistors used in this work a hole trap was found with energy ET=0.63 eV above the valence‐band edge. The concentration and capture cross section of this state were estimated to be 1014 cm−3 and 10−16 cm2, respectively.

Short-Term Charge Annealing in Electron-Irradiated Silicon Dioxide

The existence of a rapid annealing phase in the decay of space charge induced in silicon dioxide by pulsed irradiation has been demonstrated. This effect has been observed in MOS structures prepared from both wet and dry thermal oxides and also in several commercial N-channel MOSFETs. A simple model involving thermal release of the trapped positive charge from a distribution of oxide trapping levels conveniently approximates the major features of short-term annealing.