Hatem Trabelsi

An 863-870MHz spread-spectrum FSK transceiver design for wireless sensor

Simulation results of a 863-870-MHz frequency-hopped spread-spectrum transceiver with binary frequency shift keying (BFSK) modulation at 20 kb/s for wireless sensor applications is presented. The transmit/receive RF front end contains a BFSK modulator, an up conversion mixer, a power amplifier (PA), and an 863-870 MHz band pass filter (BPF) at the transmitter side and a low-noise amplifier with down conversion mixer to to zero IF, a low-pass channel-select filter, a limiter and a BFSK demodulator at the receiver side. The various blocks parameters of the transmit/receive RF front end like noise figure (NF), gain, 1 dB compression point (P-1dB)and IIP3 are simulated and optimized to meet transceiver specifications. The receiver simulations show 51.1 dB conversion gain, -7 dBm IIP3, -15 dB return loss (S11) and 10 dB NF. The transmitter simulations show an output ACPR (adjacent channel power ratio) of -22 dBc, 3.3 dBm P-1dB of PA and transmitted power of 0 dBm. The transceiver simulations show an RMS frequency error of 1.45 Khz.

FPGA implementation of FHSS-FSK modulator

This In this paper, we present the Binary Frequency Shift Keying (BFSK) modulator using the Frequency Hopping Spread Spectrum (FHSS) operating in the European band ISM 863-870 MHz. This modulator is intended for short range wireless applications, such as the wireless network sensors. The modulator generates a 7 MHz wide single-sideband, frequency hopped spread spectrum waveform for wireless transmission in the 863-870 MHz. This modulator is designed using the Direct Digital Frequency Synthesizer (DDFS) which enables us to generate BFSK signal with the hopping frequencies. Low power DDFS architecture is presented. It uses a smaller lookup table for sine and cosine functions compared with existing systems using a minimum additional hardware. A DDFS with -88 dBc spectral purity, 41.29 Hz frequency resolution and 10 bits output data for sine function generation is being implemented in an FPGA.

On/off wide tuning range voltage controlled ring oscillator for UWB pulse generator

This paper presents an on/off switched wideband three-stage voltage controlled ring oscillator for multiband ultra-wideband (UWB) systems. The ring oscillator is a part of UWB pulse generator, thus its oscillating frequency determines the central frequency of the pulse spectrum and has significant effect on spectrum fitting within UWB FCC mask. The oscillator has two control inputs, one for band switching and one for continuous control of the output frequency. The circuit was designed using ST 65nm CMOS process. Simulated data shows a very wide tuning range, approximately from 2.5GHz to 7GHz that the designed oscillator is suitable for ultra-wideband system applications. The phase noises at 1MHz and 10MHz offset are -89.2 dBc/Hz and -113.4 dBc/Hz, respectively.

A new UWB pulse shaping for IEEE 802.15.4a

This paper presents an efficient low complexity pulse shape for multiband impulse radio ultra-wideband (IRUWB) system. The generated pulse is based on combining two triangular pulses. The first one is characterized by positive amplitude where the second have smallest negative amplitude. The simulated pulse has a cross-correlation magnitude with the main lobe of the reference pulse of 0.97 for a period of at least 0.5 ns and side lobes amplitude of 0.22. The spectrum of the pulse fit easily the relative PSD mask. The simulations results show that the amplitude of the added pulse should be less than 15% versus the peak amplitude of the main pulse. The major advantage approved by this new shape is the improvement of the spectrum occupancy versus the popular shape. In addition, it is suitable for low-complexity and low power design.

Design of a zero crossing BFSK demodulator for a wireless sensor

In this paper, a transistor-level simulation result of a Zero crossing BFSK demodulator is presented. The detector will be integrated into a frequency-hopped spread spectrum receiver operating in the 863-870 MHz ISM band, using the zigbee protocol (IEEE 802.15.4). This end to demodulate a received bit sequence with a bit rate equal to 20 kbps using 0.35 μm CMOS technology and a 3 V power supply. The proposed demodulator dedicated to an application of low power and low cost can maintain good performance under process variation. The BER results show that the proposed demodulator needs only 10.9 dB input signal_to_noise ratio to achieve a BER of 10-3 as specified in zigbee standard.

A 863–870-Mhz spread-spectrum FSK transceiver design for wireless sensor

Simulation results of a 863-870-MHz frequency-hopped spread-spectrum transceiver with binary frequency shift keying (BFSK) modulation at 20 kb/s for wireless sensor applications is presented. The transmit/receive RF front end contains a BFSK modulator, an up conversion mixer, a power amplifier (PA), and an 863-870 MHz band pass filter (BPF) at the transmitter side and a low-noise amplifier with down conversion mixer to to zero IF, a low-pass channel-select filter, a limiter and a BFSK demodulator at the receiver side. The various blocks parameters of the transmit/receive RF front end like noise figure (NF), gain, 1 dB compression point (P-1dB)and IIP3 are simulated and optimized to meet transceiver specifications. The receiver simulations show 51.1 dB conversion gain, -7 dBm IIP3, -15 dB return loss (S11) and 10 dB NF. The transmitter simulations show an output ACPR (adjacent channel power ratio) of -22 dBc, 3.3 dBm P-1dB of PA and transmitted power of 0 dBm. The transceiver simulations show an RMS frequency error of 1.45 Khz.

Design of Ultra Wideband oscillator in 0.18 μm standard CMOS technology

This paper describes the design of a 3-5 GHz oscillator for Impulse-Radio Ultra-Wideband (IR-UWB) transceiver in the 0.18 μm CMOS technology. The most important specifications for the voltage control oscillator (VCO) are provided and architecture for an existing frequency plan is introduced along with a discussion on its performance and implementation. The simulated VCO can achieve very wide tuning range along with low phase noise performance that varies from -92.02 dBc/Hz to -73 dBc/Hz at 1 MHz frequency offset from the carrier and the overall power consumption is 18.1 mW from a 1.8V voltage supply.

A Novel MICS Receiver with FSK Dual Band Demodulator

A R T I C L E I N F O A B S T R A C T Article history: Received: 23 July, 2018 Accepted: 31 August, 2018 Online: 18 September, 2018 A low-complexity dual-band chirp FSK, direct conversion receiver is described in this paper. The receiver is dedicated to be used in the transceiver unit of a medical implantable wireless sensor. The system uses the RF band between 402 and 405 MHz. Two sub-bands frequencies employing chirped pulses are assigned for both binary information. The novelty of this work is the use of a Binary FSK LFM modulator, a direct conversion receiver and a simple and low power non-coherent BFSK envelope detection demodulator. Receiver performances are evaluated for all the input power dynamic range. Receiver front-end parameters are optimized using harmonic balance simulation. In order to improve receiver sensitivity, a low pass filter with controllable bandwidth between 40 and 300 KHz is used to avoid in-band interference. The receiver is able to achieve a noise figure of 5.5 dB, a receiver sensitivity of -93 dBm and a maximum data rate of 100Kbps. The simulated IIP3 and P-1dB are 12.6 dBm and 22.1 dBm respectively. A simple non coherent binary dual band FSK demodulator was used which is based on an envelope detector, integrate & dump, a sampling & hold and a liming circuit. The receiver was co-simulated with the dual band non coherent demodulator. The proposed receiver has a sensitivity of -93 dBm and a BER less than 10.

3.1–5GHz IEEE 802.15.4a impulse radio UWB receiver specifications

IEEE 802.15.4a standard targets low data-rate wireless networks with extensive battery life and very low complexity. It has introduced impulse radio ultra-wideband (IR-UWB) as an emerging physical layer for energy-efficient communications. Low-power implementation of the digital baseband processing is critical for the design of an IR-UWB receiver. Thus high speed analog to digital converters (ADC) is needed. This paper presents link radio budget analysis of the receiver. Then ADC parameters needed for the design has been computed. We conclude that 3 bits Flash ADC presents the basic choice that provide sufficient resolution and high sampling rate required for the presented UWB receiver.

Design of low power IR-UWB transmitter for healthcare monitoring applications

There is an increasing need to develop low power medical devices for healthcare monitoring applications. Recently advancement in microelectronics, micro electro mechanical systems (MEMS), telecommunications and micro biomedical sensors have enabled both development and design of such devices. Different solutions have been developed such as wireless sensor networks (WSN), intelligent habitat systems and so on. In this paper, we focus on the actimery concept. The aim is the design of RF transmitter architecture to ensure the real time data transmission. The proposed architecture is based on the IEEE 802.15.4a standard and it operates in the mandatory channel 3 of the low band. The transmitter is expected to working at a data rate of 0.850 Kbps and using BPSK modulation. The simulated TX has peak amplitude of 325mV, transmitted power of − 13.05dBm and a noise figure of 9.2dB.