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Dive into the research topics where Heinz Hönigschmid is active.

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Featured researches published by Heinz Hönigschmid.


symposium on vlsi circuits | 2007

Time Discrete Voltage Sensing and Iterative Programming Control for a 4F 2 Multilevel CBRAM

P. Schrogmeier; Michael Angerbauer; Stefan Dietrich; Milena Ivanov; Heinz Hönigschmid; Corvin Liaw; Michael Markert; Ralf Symanczyk; L. Altimime; S. Bournat; Gerhard Müller

Multilevel read/write circuits developed for a 90 nm, 4F2, 1T1CBJ (1-transistor/1-conductive bridging junction) 4Mb CBRAM core are described for the first time. The design uses an on-pitch time-discrete voltage sensing scheme and employs a bitline (BL) charge balancing reference as well as a self-timed iterative program concept. Random read cycle times ap0.7 mus and random write cycle times ap1.35 mus are achieved.


Archive | 2008

Halbleiterkomponente mit Durchkontakten

Heinz Hönigschmid; Arkalgud Sitaram


Archive | 2008

Resistive switching memory cell e.g. phase change random access memory cell, operating method for e.g. flash memory, involves reading memory cell data content by applying voltage to cell in range of one threshold voltage or higher voltage

Michael Markert; Milena Dimitrova; Heinz Hönigschmid


Archive | 2006

Read circuit for resistive memory

Thomas Nirschl; Heinz Hönigschmid


Archive | 2009

Method for determining storage condition of storage cell, involves setting electrode of storage cell on potential and then setting another electrode of storage cell on another potential, which is different from former potential

Michael Angerbauer; Heinz Hönigschmid; Corvin Liaw


Archive | 2008

Integrated circuit e.g. dynamic RAM, for use in electronic device, has resistive memory cell, and p-channel transistor that produces predetermined reading voltage for smaller resistance range which has reference conditions of reference cell

Heinz Hönigschmid


Archive | 2008

Memory chip has multiple floating body dynamic random access memory cells and word line, which is coupled with two floating body dynamic random access memory cells

Milena Dimitrova; Heinz Hönigschmid; Stefan Dietrich; Michael Markert


Archive | 2008

Method and storage switching device for operating a resistance storage cell

Heinz Hönigschmid; Milena Ivanov; Corvin Liaw; Gerhard Müller


Archive | 2008

Resistive memory cell for use in a memory component, comprises resistive memory element with two resistive conditions, where selection unit is provided with interconnected and disconnected condition

Heinz Hönigschmid; Stefan Dietrich; Milena Ivanov; Michael Markert


Archive | 2008

Integrierte Schaltung, Speichermodul, Verfahren zum Betreiben einer integrierten Schaltung, Verfahren zum Herstellen einer integrierten Schaltung, und Computerprogramm

Bernhard Ruf; Michael Kund; Heinz Hönigschmid

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