Corvin Liaw
Infineon Technologies
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Publication
Featured researches published by Corvin Liaw.
symposium on vlsi circuits | 2006
Heinz Hönigschmid; M. Angerbauer; S. Dietrich; Milena Dimitrova; D. Gogl; Corvin Liaw; M. Markert; R. Symanczyk; L. Altimime; S. Bournat; G. M¿ller
A 2Mbit CBRAM (conductive bridging random access memory) core has been developed utilizing a 90nm, VDD = 1.5V process technology. The presented design uses an 8F2 (0.0648mum2) 1T1CBJ (1-transistor/1-conductive bridging junction) cell and introduces a fast feedback regulated CBJ read voltage and a novel program charge control using dummy cell bleeder devices. Random read/write cycle times les50ns are demonstrated
Archive | 2005
Corvin Liaw; Thomas Roehr; Michael Kund
Archive | 2005
Heinz Hoenigschmid; Milena Dimitrova; Corvin Liaw; Michael Angerbauer
Archive | 2006
Heinz Hoenigschmid; Gerhard Mueller; Milena Dimitrova; Corvin Liaw
Archive | 2005
Thomas Mikolajick; Hans Reisinger; Josef Willer; Corvin Liaw
Archive | 2005
Corvin Liaw
Archive | 2004
Karl-Heinz Küsters; Josef Willer; Corvin Liaw
Archive | 2005
Thomas Mikolajick; Josef Willer; Corvin Liaw
Archive | 2006
Corvin Liaw; Josef Willer
Archive | 2005
Corvin Liaw; Josef Willer; Michael Kund