Hidekatsu Onose

Normally-off SiC-JFET inverter with low-voltage control and a high-speed drive circuit

A highly efficient inverter was achieved by using normally-off SiC-JFETs (silicon carbide junction FETs) as switching devices. A precise control system for the gate voltage and the high-speed driver circuit are quite important issues in the realization of an inverter system for operating JFETs with threshold voltage lower than 2V and for the reduction of switching loss. A two step push-pull circuit for precise control of the gate voltage and a speed-up capacitor circuit for high-speed operation are developed and high-speed switching of 600 V/2A SiC-JFET modules is demonstrated. The 50 W fan motor for an exterior unit of an air conditioner has been successfully operated by these SiC modules and developed driver circuits, and the the inverter efficiency was improved by about 6%, compared with conventional IGBT inverters.

Normally-Off 4H-SiC Vertical JFET with Large Current Density

We developed normally-off 4H-SiC vertical junction field effect transistors (JFETs) with large current density. The effect of forming an abrupt junction between the gate and the channel was simulated, and vertical JFETs were then fabricated with abrupt junctions. As a result, a large rated drain current density (500 A/cm2) and a low specific on-resistance (2.0 mWcm2) were achieved for small devices. The blocking voltage was 600 V. These results were due to a reduction of the threshold voltage by forming the abrupt junction between the gate and the channel.

Influence of Lateral Spreading of Implanted Aluminum Ions and Implantation-Induced Defects on Forward Current–Voltage Characteristics of 4H-SiC Junction Barrier Schottky Diodes

Forward current density (J_F)-forward voltage (V_F) characteristics are experimentally and computationally investigated for 4H-silicon carbide junction barrier Schottky (JBS) diodes with a lightly doped (3 - 5 times10¹⁵ cm^-3) drift layer and 2-mum-wide p⁺ stripe regions separated by 1 mum. The J_F-V_F characteristics of fabricated JBS diodes are compared with those of Schottky barrier diodes simultaneously fabricated on the same epitaxial wafers. These J_F-V_F characteristics are also compared with those of simulated JBS diodes, assuming boxlike and Monte Carlo-simulated profiles of aluminum. In the simulation of aluminum ion implantation, concentration contours of created interstitials and vacancies are calculated, and their influence on the J_F-V_F characteristics of JBS diodes is discussed in terms of degradation of electron mobility in the surface region of the drift layer.

Over 2000 V FLR termination technologies for SiC high voltage devices

The Field Limiting Ring (FLR) termination structures are examined in order to confirm the high voltage technology of SiC diodes and FETs. Elemental devices with planar FLR terminations are fabricated and their reverse I-V characteristics are determined using 4H n-type SiC. First demonstrations of breakdown voltages higher than 2000 V are succeeded by using FLR terminations. Optimal FLR spacing of the boron termination is wider than that of the aluminum case. This difference is considered to show that the lateral diffusion is remarkable for the process using boron implantation.

Traction inverter that applies hybrid module using 3-kV SiC-SBDs

We have developed SiC-Schottky barrier diodes with a JBS structure that have characteristics of low forward voltage and low leakage current at 3 kV. Further, we have built a prototype of a 3 kV/200 A SiC hybrid module, equipped with Si-IGBTs and SiC-Schottky barrier diodes. We have achieved to reduce the recovery loss and the turn-on loss, by using the SiC hybrid module and a high-speed drive circuit. Moreover, we estimated that the total energy loss of the converter and inverter using the developed SiC hybrid module was reduced to about 30%. Additionally, the inverter succeeded in driving an induction motor for a train.

Design consideration for 2 kV SiC-SIT

Process technologies of the novel Static Induction transistor with source-gate self-aligned and overlapping (SAO) structures are considered in order to reduce the restrictions of alignment problems. A SiC-SIT with SAO structure is fabricated by using aluminum implantation for p gate on 4H n-type SiC. It is found that the SAO structure can be fabricated as expected by observing the cross sectional structure. Very low specific on-resistance of 39 m/spl Omega/ cm/sup 2/ is successfully obtained. By reducing a unit cell, lower on-resistance can be expected as a half of this work.

Dual-Pearson Approach to Model Ion-Implanted Al Concentration Profiles for High-Precision Design of High-Voltage 4H-SiC Power Devices

We demonstrate a Dual-Pearson approach to model ion-implanted Al concentration profiles in 4H-SiC for high-precision design of high-voltage power devices. Based on the Monte Carlo simulated data for 35-400 keV implantation, we determine the nine Dual-Pearson parameters and confirm precise reproduction of profiles of 1015-1021 cm-3 Al with sufficient smoothness. This leads to a direct incorporation of implanted Al profiles into a device simulator. The influence of dose and energy on channeling is also discussed from the view point of implantation-induced disorder in 4H-SiC.

High power GTO with high turn-off ruggedness

A 6 kV, 6 kA pnpn type GTO was fabricated and its turn-off failure mechanism was investigated. Current concentration progressed remarkably in the fall period according to a simulation model. The homogenizing GTO segment on-state voltage was effective for reducing the current concentration. The maximum controllable current was increased by a factor of 1.2 by introducing a homogeneity fabrication process.

Investigation of Low Loss and High Reliability Encapsulation Technology in Large-Area, High-Power Semiconductor Devices

In order to realize uniform and low contact resistance in the low mounting force region for large-area, high-power semiconductor devices, the effects of hardness and surface cleanliness of metal sheets inserted between an Al cathode and Mo internal electrode on the contact resistance were investigated as a function of mounting force. Contact resistance was lowered with increasing cleanliness and decreasing hardness of the inserted sheet for all values of the mounting force. A new process was developed in which an Ag-plated Mo sheet is heat-treated at 573 K for 15 min in air. It was confirmed that devices with the new Ag-plated Mo sheet have efficient long form reliability. The contact resistance and its dependence on the mounting force of the devices using this sheet are of the same level as those of an Ag-sputtered Mo sheet and an Ag sheet.

A Highly Efficient 3.3-kV SiC-Si Hybrid Power Module with a Novel SiC JBS Diode and a Si Advanced Trench HiGT

A 3.3-kV SiC-Si hybrid module, composed of a low-forward-voltage (VF) SiC junction-barrier-Schottky (JBS) diode and a low-saturation-voltage VCE(sat) Si trench IGBT was fabricated and demonstrated highly efficient operation.