Hideki Takeuchi

A DRAM module generator with an expandable cell array scheme

This paper describes a DRAM module generator (DRAMGen) with an expandable cell array scheme. DRAMGen uses a modularization scheme. This expandable cell array scheme uses the cell array segment as the unit of increment and applies shared sense-amplifier scheme. This scheme reduces the area penalty to less than five percent and has little performance penalty. Using a 0.35 /spl mu/m process technology, a series of DRAM macros with flexible bank, row, column, and I/O-bit configurations consequently produce 2112 derivatives. The module generator has successfully generated a number of macros, taking five seconds for each macro, including a 32 Mb macro with a 150 MHz cycle time.