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Featured researches published by Shigeyuki Hayakawa.


international symposium on vlsi design, automation and test | 2006

Alpha and Neutron SER of embedded-SRAM and Novel Estimation Method

Toshikazu Fukuda; Shigeyuki Hayakawa; Naoyuki Shigyo

Alpha and neutron SERs of embedded-SRAMs are evaluated. From the results for several technology generations, SER is expressed as a function of diffusion area and critical charge for devices, but the effect of collection efficiency is constant for the generations. Then, the technology independent SER model named universal curve is introduced. Moreover, SER trend to 45nm generation is quantitatively estimated based on the future trend of device technology


Archive | 1991

Static random access memory including stress test circuitry

Masataka Matsui; Tohru Furuyama; Shigeyuki Hayakawa; Kiyofumi Ochii


Archive | 1989

Static random access memory with address transition detector

Shigeyuki Hayakawa; Masataka Matsui


Archive | 1992

Semiconductor integrated circuit having a voltage stepdown mechanism

Shigeyuki Hayakawa; Leiichi Yanagisawa


Archive | 1993

Semiconductor memory device having redundant circuit

Hideki Takeuchi; Shigeyuki Hayakawa; Tomoaki Yabe


Archive | 1999

Impedance matching circuit, high speed semiconductor integrated circuit employing the same and computer system employing the integrated circuit

Azuma Suzuki; Shigeyuki Hayakawa


Archive | 1997

Cache memory system having high and low speed and power consumption modes in which different ways are selectively enabled depending on a reference clock frequency

Tsukasa Shirotori; Shigeyuki Hayakawa


Archive | 2006

Anti-fuse memory circuit

Toshiyuki Kouchi; Shigeyuki Hayakawa


Archive | 2000

Address converting circuit utilizing string comparison and carry information calculation

Shigeyuki Hayakawa; Tsuyoshi Midorikawa


Archive | 1991

Thin-film transistor, free from parasitic operation

Kiyofumi Ochii; Shigeyuki Hayakawa

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