Hiromitsu Kimura

Complementary ferroelectric-capacitor logic for low-power logic-in-memory VLSI

A novel nonvolatile logic style, called complementary ferroelectric-capacitor (CFC) logic, is proposed for low-power logic-in-memory VLSI, in which storage elements are distributed over the logic-circuit plane. Standby currents in distributed storage elements can be cut off by using ferroelectric-based nonvolatile storage elements, and the standby power dissipation can be greatly reduced. Since the nonvolatile storage and the switching functions are merged into ferroelectric capacitors by the capacitive coupling effect, reduction of active device counts can be achieved. The use of complementary stored data in coupled ferroelectric capacitors makes it possible to perform a switching operation with small degradation of the nonvolatile charge at a low supply voltage. The restore operation can be performed by only applying the small bias across the ferroelectric capacitor, which reduces the dynamic power dissipation. Applying the proposed circuitry in a fully parallel 32-bit content-addressable memory results in about 2/3 dynamic power reduction and 1/7700 static power reduction with chip size of 1/3, compared to a CMOS implementation using 0.6-/spl mu/m ferroelectric/CMOS.

Electrical conduction mechanism in nonstoichiometric La3Ta0.5Ga5.5O14

The electrical conduction mechanism in La3Ta0.5Ga5.5O14 (LTG) was studied from the standpoint of defect formation during growth caused by the nonstoichiometry of the crystal. Since the stoichiometric composition of LTG does not coincide with the congruent composition, single crystals grown from the stoichiometric melt under an atmosphere of O2/Ar in the oxygen partial pressure range from 0.005 to 1 atm was Ta-poor. Ta vacancies were formed during the growth, and their population was predominated by the growth-pO2. With increasing temperature up to 600u2009°C, the Ta vacancies were ionized to yield holes, and thus the electrical conductivity of the LTG crystal varied with temperature and growth-pO2. In contrast, Ga vacancies as a carrier source would form by Ga evaporation during growth under pO2 below 0.005 atm. The growth-pO2 dependence of the electrical conductivity was opposite to the case for Ta vacancies. For the case of sintered LTG with the exact stoichiometric composition, impurity defects dominated e...

Ferroelectric-based functional pass-gate for fine-grain pipelined VLSI computation

The state-transition scheme of remnant polarization in a ferroelectric capacitor performs storage and switching functions simultaneously with a functional pass-gate. As an example of fine-grain pipelined VLSI computation, a 250 MHz 54/spl times/54 b pipelined multiplier has 2.5 W estimated power dissipation in a 0.6 /spl mu/m ferroelectric/CMOS technology.

A study of multiple-valued magnetoresistive RAM (MRAM) using binary MTJ devices

This paper presents four-valued magnetoresistive RAM (MRAM) storage cells using one access transistor and two binary magnetic tunnel junction (MTJ) devices, with the MTJ devices either in series or in parallel. We present a comparative study of the two cells in terms of their area and power benefits over the binary MRAM, all using the same conventional MRAM process.

Multiple-valued content-addressable memory using metal-ferroelectric-semiconductor FETs

This paper presents a design of a non-volatile multiple-valued content-addressable memory (MVCAM) using metal-ferroelectric-semiconductor (MFS) FETs. An MFSFET is an important device with a non-destructive read scheme. Multiple-valued stored data are directly represented by remnant polarization states that correspond to threshold voltages of an MFSFET. Since one-digit comparison between multiple-valued input and stored data is performed by the combination of two different threshold operations, a one-digit comparator can be designed by two MFSFETs. The use of the one-digit comparator makes it possible to design a compact MVCAM cell. It is evaluated that the performance of the proposed MVCAM is superior to that of some binary and multiple-valued CAMs in terms of bit density, peripheral-circuit complexity, access speed, and functionality.

Ferroelectric-based functional pass-gate for low-power VLSI

A ferroelectric-based functional pass-gate is proposed for low-power logic-in-memory VLSI which makes communication bottlenecks free. Since non-destructive storage and switching functions are merged into a ferroelectric capacitor, active-device counts become small, which reduces the dynamic power dissipation. The use of ferroelectric-based non-volatile storage makes leakage currents cut off. Applying the ferroelectric-based circuitry to binary CAM implementation results in about half dynamic power reduction and 1/22000 static power reduction, compared to a. CMOS implementation under 0.6 /spl mu/m ferroelectric/CMOS.

Ferroelectric Non-Volatile Logic Devices

The reduction of the power consumption is becoming more essential for portable systems. A powering down scheme is very useful to reduce power comsumption of LSIs. The scheme needs to keep logic state, so several latch circuits have been reported. However, these methods require large additional circuit or special manufacturing process. A non-volatile latch with ferroelectric capacitors is simple and smart way [1], and its area penalty is very small. The non-volatile device needs no power supply for data keeping. Moreover, a dynamic reconfigurable logic can be possible by using the non-volatile latch as non-volatile switches.

Precipitation phenomena in and electrical resistivity of high-temperature treated langatate (La 3 Ta 0.5 Ga 5.5 O 14 )

La₃Ta_0.5Ga_5.5O₁₄ (LTG) single crystals, which have no phase transition up to the melting point, were heat treated in air at temperatures from 1000°C to 1450°C for 10 h. LaTaO₄ (LT) and LaGaO₃ (LG), which coexist with LTG in the three-phase region on the Ga-poor side, precipitated on the surface of the crystal for heat treatments above 1300°C because of Ga evaporation during the heat treatment. The Ga-poor state near the surface of the 1450°C heat-treated specimen was confirmed by electron probe micro-analysis measurements. The electrical resistivity of LTG single crystals de creased by heat treatment in the range of 1000°C to 1200°C for 10 h in air, where no precipitation was observed, whereas the resistivity increased with heat treatment over 1400°C for 10 h in air. The electrical resistivity of the Ga-poor surface region was higher than that of the interior.

Implementation of a Standby-Power-Free CAM Based on Complementary Ferroelectric-Capacitor Logic

A complementary ferroelectric-capacitor (CFC) logic-circuit style is proposed for a compact and standby-power-free content-addressable memory (CAM). Since the use of the CFC logic circuit in designing a CAM cell makes it possible to merge both logic and non-volatile storage elements into serially connected ferroelectric capacitors, the CAM becomes compact. The standby power of the CAM is completely eliminated because the supply voltage can be cut off with maintaining stored data in the CAM. The test chip is fabricated by using 0.35-mum ferroelectric CMOS, and the basic behavior can be also measured.

Multiple-valued logic-in-memory VLSI based on ferroelectric capacitor storage and charge addition

A multiple-valued logic-in-memory VLSI using ferroelectric capacitors is proposed to realize an arithmetic-oriented VLSI with real-time programmable capacitor storage. The use of a remnant-polarization charge on a ferroelectric capacitor makes it possible to perform not only a real-time programmable storage function but also a linear-sum function, thereby resulting in a compact hardware while maintaining a high-speed processing capability. As a design example, a full adder with a storage capability is evaluated. Its performance is superior to that of a corresponding binary CMOS implementation.