Hiroshi Yoshida
Toshiba
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Featured researches published by Hiroshi Yoshida.
international solid-state circuits conference | 2005
Hiroshi Yoshida; Shuichi Sekine; Yumi Fujita; T. Suzuki; Shoji Otaka
A high-sensitivity rectifier is fabricated in a 0.3 /spl mu/m CMOS technology. The circuit can rectify an RF signal less than the NMOS threshold voltage by using a bias voltage between the gate and the drain terminals of a transistor. The IC achieves a 950 MHz signal rectification over -14 dBm corresponding to 10 m-distance communication and recharges a 1.2 V secondary battery.
IEEE Transactions on Electrical Insulation | 1986
Hiroshi Yoshida; K. Umemoto
In recent years it is strongly required to have high reliability in rotating machines. On the stator windings, many kinds of non-destructive tests can be used to check their deterioration or to estimate their life. This section describes the status of insulation diagnosis for rotating machine insulation in Japan. These are (1) deterioration judgement criteria, (2) diagnostic methods under development and (3) monitoring methods.
IEEE Transactions on Electrical Insulation | 1987
Hiroshi Yoshida; Yasuaki Ishioka; Toshio Suzuki; Toshiyuki Yanari; T. Teranishi
Insulating papers and pressboards must have high dielectric strength and high tensile strength. However, these materials are gradually degraded due to thermal stress, oxygen, and moisture. Because the tensile strength decreases owing to degradation, the degradation of insulating material may affect the life of transformers. In our laboratory, through accelerated tests using models of oil-impregnated insulating systems, changes in characteristics of insulating cellulose materials have been investigated. These data were compared with data obtained from insulating papers of transformers with long service life. From these investigations, good correlation was found between the amount of gas generated from insulating papers in insulating oil and the retention of tensile strength and of degree of polymerization. Using this correlation, the degree of degradation of insulating papers in transformers may be known from the amount of gas. The average characteristic curves of insulating papers from transformers coincides with the degradation curve of 90 ° C ob tained in experiments. And if the life of insulating papers is considered to be equal to the life of transformers, the life of transformers is between 20 and 40 years.
wireless communications and networking conference | 2005
Ichiro Seto; Takahiro Sekiguchi; Hidehiro Matsuoka; Akihiro Tsujimura; Syuichi Sekine; Kazumi Sato; Hiroshi Yoshida; Minoru Namekata
An antenna-selective transmit diversity (ASTD) technique, applied to a PC card for an orthogonal frequency division multiplexing (OFDM)-based wireless local area network (WLAN) system, is presented. The PC card, which is based on IEEE 802.11 a/g, is equipped with dual-band printed antennas. The ASTD processing is implemented in the developed WLAN system, which has two antennas for transmit and receive modes. The effects of the ASTD technique on the TCP (transmission control protocol) throughput performance are experimentally evaluated. Measurement results with the PC card in an imitated office show that the TCP throughput is improved on both the 2.4 and 5.2 GHz bands under the conditions of an indoor radio propagation channel due to the ASTD technique. In particular, application of the ASTD technique to an access point (AP) achieves four times the average TCP throughput on the 5.2 GHz band.
IEEE Journal of Solid-state Circuits | 1999
Takanori Saeki; Koichiro Minami; Hiroshi Yoshida; H. Suzuki
A nonfeedback CMOS digital-clock-generator, direct-skew-detect synchronous-mirror-delay (direct SMD) circuit has been developed that achieves clock-skew suppression in only two clock cycles for application-specific integrated circuits having unfixed and various clock paths. The direct SMD circuit detects both clock skew and clock cycle by using a direct-skew detector and clock-suspension circuitry. The skew-detection scheme removes the phase errors caused by delay in the clock-driver circuit. Measurements demonstrated that the direct SMD circuit eliminates various amounts of clock skew (2.0-3.0 ns) at 200 MHz in two clock cycles.
IEEE Journal of Solid-state Circuits | 1999
Mohammad Madihian; Tomislav Drenski; Laurent Desclos; Hiroshi Yoshida; Hiroshi Hirabayashi; Tohru Yamazaki
This paper reports the first multifunctional 0.4-/spl mu/m BiCMOS-based transceiver chip developed for 5-GHz-band Gaussian minimum-shift keying modulation wireless systems. The chip integrates a low-noise radio-frequency amplifier, a down-mixer, and an intermediate-frequency (IF) amplifier in the down-converter path; an IF amplifier, a limiter, an up-mixer, and a buffer amplifier in the up-converter path; and a frequency doubler and a local oscillator amplifier in the local oscillator path. The chip featuring gain attenuation as well as standby mode operation uses a single 2.6-5.2-V bias voltage and dissipates 56 mW in receive mode and 66 mW in transmit mode. The transceiver chip size is 3.0/spl times/2.4 mm/sup 2/.
personal indoor and mobile radio communications | 1998
Hiroshi Yoshida; Hiroshi Tsurumi; Yasuo Suzuki
This paper presents a method to remove the DC offset which degrades the performance of a direct conversion receiver for burst mode QPSK signals. A canceller constructed from analog and digital signal processing circuits is proposed. Computer simulation results show that the canceller has a remarkable function of reducing the degradation in BER (bit error rate) performance by only 0.4 dB. The results show that the proposed offset canceller is suitable for the reception of burst mode QPSK signals such as those employed in NADC (North American Digital Cellular) and PHS (Personal Handy-phone System).
vehicular technology conference | 1999
Hiroshi Yoshida; Hiroshi Tsurumi; Y. Suzuki
A software-defined radio is one of the solutions for realizing a multi-mode terminal for various mobile communication standards. The software-defined radio can be changed by replacement of the application software, including modems, filters, equalizers and so on. A radio terminal architecture fit for the ideal software-defined radio implementation is described. A broadband RF-stage configuration, which introduces the direct conversion principle, is proposed for realizing the multi-mode software-defined radio. A software configuration including the application program which does not depend on the hardware, and the basic programs which reconcile the differences between hardware and execution procedure, are also proposed.
IEEE Transactions on Microwave Theory and Techniques | 1996
Mohammad Madihian; Kiyotaka Imai; Hiroshi Yoshida; Yasushi Kinoshita; Tohru Yamazaki
This paper Is concerned with the design considerations and performance results for low-voltage Si monolithic microwave integrated circuits (MMICs) developed for mobile and personal communications applications. A 0.4 /spl mu/m ECL-BiCMOS process technology was employed to develop bipolar-based RF amplifiers, MOS-based IF amplifiers, BiCMOS-based simplified Gilbert mixers, and monolithic down-converter as well as upconverter ICs incorporating these elements. These converters are designed to operate at a bias voltage of 2 V over 1.8-6.2 GHz exhibiting a conversion gain of 35-15 dB with a variable IF frequency of up to several 100 MHz. Chip size for both the downconverter and upconverter ICs is 1.0 mm/spl times/0.7 mm.
radio frequency integrated circuits symposium | 2003
Hiroshi Yoshida; Takayuki Kato; Takehiko Toyoda; Ichiro Seto; Ryuichi Fujimoto; T. Kimura; Osamu Watanabe; Tadashi Arai; Tetsuro Itakura; Hiroshi Tsurumi
A fully differential direct conversion receiver IC for W-CDMA is presented. The receiver IC consists of a complete active portion of a W-CDMA receiving system, such as an LNA, quadrature demodulator, low-pass filter (LPF), and variable gain amplifier (VGA). In order to suppress the DC offset, which is the most important issue in a direct conversion system, an active harmonic mixer is applied to the quadrature demodulator. Furthermore, the receiving system, including an LNA and RF filter, adopts a differential architecture to reduce local signal leakage, which generates DC offset. The performance of the entire receiving system was evaluated and the DC offset in steady state was measured at only 40 mV. Moreover, the DC offset variation in the LNA gain change, which has the largest affect on the receiving performance, was limited to 60 mV, which is less than -10 dB compared to the desired signal strength. It was confirmed by computer simulation that the DC offset variation in the LNA gain change did not degrade the bit error rate (BER) performance at all.