Hisaya Murakoshi

Self-organized growth of GaAsInAs heterostructure nanocylinders by organometallic vapor phase epitaxy

Abstract Free-standing GaAs InAs heterostructure wires as thin as 20 nm and as long as 1 μm have been formed by vapor-liquid-solid (VLS) growth during organometallic vapor phase epitaxy. The grown wires were analyzed by transmission electron microscopy, which revealed that the crystal structure of the GaAs portion coincides with that of zincblende, and the InAs portion coincides with that of wurtzite. The atomic composition along the heterojunction was also measured by energy dispersive X-ray analysis. The composition changes within a width of 5 nm at the heterojunction interface. The InAs GaAs wires show a photoluminescence peak around 1.5 eV at 14 K, which indicates significant improvement in crystal quality over conventional GaAs InAs layer structures.

An energy analyzer for high-speed secondary electrons accelerated in inspection SEM imaging

An energy analyzer has been developed to evaluate sample charging and voltage-contrast (VC) in a retarding-type scanning electron microscope (SEM) for inspecting semiconductor devices for defects. Since secondary electrons (SEs) are accelerated by the strong retarding field, a high degree of accuracy is needed to evaluate the energy of SEs. The energy analyzer consists of several electrodes for forming suitable electrostatic lens fields. Evaluation results showed that energy resolution of 2 eV for SE incident energy of 9.5 keV was attained and that evaluations of charging voltages on patterned samples were performed quantitatively.

Effect of rapid epitaxy in in situ phosphorus-doped polysilicon emitter on current-gain of bipolar transistors

The effect of rapid solid-phase epitaxy (SPE) on the current gain of in situ phosphorus-doped polysilicon-emitter (IDP) transistors has been evaluated, IDP technology is used to produce very-high-speed small-emitter bipolar transistors, which have very high current gain due to their hetero-emitter-like characteristics. The IDP film is deposited on a clean poly/mono-silicon surface, followed by rapid thermal annealing (RTA). The poly/mono interface was analyzed and the lattice image was observed by high-resolution transmission electron microscopy (TEM). The majority of the IDP transistors had poly/mono-silicon interfacial hetero-emitter-like characteristics and thus had high current gain. The remaining transistors, however, did not exhibit hetero-emitter-like characteristics due to SPE and thus the current gain was reduced. These results are well explained using an interfacial residual-stress model: rapid epitaxy occurs when the amorphous silicon film is annealed by RTA, which eliminates the interfacial residual stress and in turn the hetero-emitter-like characteristics.

Automatic electron beam metrology system for development of very large‐scale integrated devices

A computer‐controlled electron beam metrology system has been developed which is capable of measuring a large number of features automatically. The system also evaluates the distribution of critical dimensions (CD) on a wafer in order to promote submicron very large‐scale integrated process technology. This system provides nondestructive measurement in a semiconductor production line by using a low voltage electron beam from a field emission gun. The system consists of a computer‐controlled optical column, a precise X‐Y stage controlled by a laser interferometer, high‐accuracy electronic circuits and a control computer. The system places submicron patterns under the electron beam within a ±0.05 μm deviation and measures them step‐by‐step under the optimum beam conditions. Repeatability is 0.008 μm with a throughput of 100 features/h.