Hocine Boubekeur

Platinum contamination issues in ferroelectric memories

The contamination risk of processing with platinum electrodes on device performance in ferroelectric memories is assessed in this work. Details of platinum diffusion to the active regions at annealing temperatures of 800 °C are investigated by secondary ion mass spectroscopy, deep level transient spectroscopy, and Rutherford backscattering spectrometry techniques. Cross sectional transmission electron microscopy and local elemental analysis by energy dispersive x-ray spectroscopy were used to examine the precipitation of Pt in defect free silicon as an eventual cause of gate oxide degradation. The impact of platinum contamination on device performance is evaluated under the typical ferroelectric memory processing conditions. Results from leakage current and charge to breakdown measurements of intentionally contaminated diode and metal–oxide–semiconductor (MOS) structures, respectively, are presented. The results show that the degradation depends strongly on device design and configuration. A phosphorus do...

Impact of platinum contamination on ferroelectric memories

Abstract The impact of platinum contamination on the breakdown properties of gate oxide is reported. Wafers were intentionally contaminated with 1×1013 to 4×1014 at/cm2 Pt after a 7.5 nm gate oxide growth, 300 nm poly-silicon deposition and subsequent phosphorus doping. Breakdown characteristics were evaluated using a voltage ramp method. The current-voltage curves of MOS capacitors show very few low field breakdown events, and the main field breakdown occurs at 12 MV/cm. If compared to clean wafers, platinum does not increase the defect density seriously. It is found from the E-Ramp results that platinum contamination up to 4×1014 at/cm2 does not have a pronounced effect on the gate oxide integrity if the contamination occurs after front-end-of-line processing of device fabrication.

Effect of barium contamination on gate oxide integrity in high-k dram

Abstract Barium impact on the gate oxide breakdown was studied using E -ramp and constant current stress (CCS) charge to breakdown. Wafers were contaminated with Ba after a 7.5 nm gate oxide growth and 300 nm poly-silicon deposition. The measurements were done on capacitors having areas of 0.1, 1, 4, and 16 mm 2 . Up to a contamination level of 4×10 14 atoms/cm 2 no degradation in oxide integrity was observed either by E -ramp or CCS. Time of flight (ToF)-SIMS measurement of Ba diffusion profile at 800 °C shows a diffusion of Ba over distances of some tens of nanometers, thus Ba does not reach the gate oxide region. The effect on the gate oxide breakdown can be correlated with the slow diffusion of Ba in poly-Si. Therefore, no major concern of yield and reliability due to Ba contamination is seen for the integration of Ba containing dielectrics into memories.