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Featured researches published by Hongching Shan.


Journal of Vacuum Science & Technology B | 1996

Process kit and wafer temperature effects on dielectric etch rate and uniformity of electrostatic chuck

Hongching Shan; Bryan Pu; Hua Gao; Kuang-Han Ke; Jenny Lewis; Michael Welch; Chandra Deshpandey

Etch rate and uniformity are two basic indicators of how rf power is coupled into the wafer. In reactive ion etch of dielectric layers, wafer temperature also appears as a key parameter, due to the innate deposition. When electrostatic chuck is introduced, we have to study and control both rf coupling and wafer temperature to maximize etch rate and minimize nonuniformity. We first review the basics of the electrostatic chuck (e‐chuck) design and operation, and check them against Applied Materials’ polyimide monopolar e‐chuck. Then a simple circuit model is developed and fitted to the experimental results. The model says to have higher etch rate, one needs to couple more energy through the wafer center. This is achieved by using a thicker insulating process kit with low dielectric constant. The uniformity study shows for a given wafer, its etch rate variation across the wafer can be divided into three sections—center, B‐field corner, and very edge of the wafer, and each section is controlled by a key param...


Journal of Vacuum Science & Technology B | 1996

MxP+: A new dielectric etcher with enabling technology, high productivity, and low cost‐of‐consumables

Hongching Shan; Evans Lee; Michael Welch; Bryan Pu; James D. Carducci; Kuang-Han Ke; Hua Gao; Paul E. Luscher; Gerard Crean; Rynn Wang; Richard Blume; James Cooper; Robert W. Wu

Dielectric etch accounts for more than half of all the dry etches used in integrated circuit (IC) fabrication, and plays a very important role in fulfilling strict requirements of volume‐manufacturing of IC circuits whose feature size is progressively decreasing. The challenge of meeting volume manufacture requirements is what MxP+ has achieved through a series of hardware and process innovations. By Pareto analysis of the wet clean time of the MxP chamber, we were able to define six major drivers to address three key issues: (1) reduce wet clean time, (2) eliminate system complexity, and (3) achieve technical excellence. Key components of the MxP+ that allow us to address them include a quartz gas distribution plate which prevents the aluminum particle formation, and the electrostatic chuck which eliminates the mechanical clamp system while reducing the particle contamination and wafer edge exclusion. The unique chamber liners of the MxP+ not only shield chamber walls, but also provided a wide process wi...


international symposium on plasma process-induced damage | 2002

Plasma charging damage characterization of 200mm and 300mm dielectric etch chambers using bias voltage diagnostic cathodes

Shaming Ma; Michael C. Kutney; Semyon Kats; Tom Kropewnicki; Roger Alan Lindley; Kenny L. Doan; Keiji Horioka; Dee Lane; Hongching Shan

A V/sub DC/ bias diagnostic cathode is developed to measure the plasma-induced self bias uniformity on the wafer and the correlation to device charging damage on both 200mm and 300mm dielectric etch chambers. Multiple probe pins are buried within the ceramic electrostatic chuck surface with only the top surface tips exposed to plasma. The wafer surface DC bias voltage during the plasma process can be directly measured in-situ from these probes with built-in circuitry. The maximum bias difference (/spl Delta/V/sub DC/ = V/sub DC(max)/ - V/sub DC(min)/) of measured on-wafer V/sub DC/ correlates to device damage during the plasma process. Comparing 200mm and 300mm chamber measurement results, the scale-up process in 300mm chamber is identified to have similar uniformity performance as in 200mm chamber. Using device calibration data compared to /spl Delta/V/sub DC/ values, the plasma damage performance in both 200mm and 300mm chambers can be predicted in early chamber or process development stages.


international symposium on plasma process induced damage | 2000

Plasma damage evaluation of an integrated in-situ directional resist stripping process in magnetically enhanced RIE etcher for dual damascene application

S. Ma; M. Dahimene; C.H. Bjorkman; Hongching Shan; R. Ramanathan

This paper demonstrates the plasma induced device damage performance of a directional resist removal process for Cu/low-k dielectric dual damascene interconnect integration application. A Magnetically Enhanced Reactive Ion Etching (MERIE) chamber running oxygen based plasma is used for this study with a clean chamber mode. Parameters including power, pressure, overetch and gas species are investigated on the plasma induced charging damage of 0.25 /spl mu/m technology devices. It is found that power is the most sensitive parameter than B-field, pressure, overetch and gas species to control damage. A contact bottom polymer/etch stop nitride shielding mechanism is proposed to explain the plasma damage sensitivity in oxygen plasma environment.


Archive | 2000

Etch method using a dielectric etch chamber with expanded process window

Jingbao Liu; Judy Wang; Takehiko Komatsu; Bryan Pu; Kenny L. Doan; Claes Bjorkman; Melody Chang; Yunsang Kim; Hongching Shan; Ruiping Wang


Archive | 2002

Dielectric etch chamber with expanded process window

James D. Carducci; Hamid Noorbakhsh; Evans Lee; Bryan Pu; Hongching Shan; Claes Bjorkman; Siamak Salimian; Paul E. Luscher; Michael Welch


Archive | 1996

Method for etching dielectric layers with high selectivity and low microloading

Bryan Pu; Hongching Shan; Michael Welch


Archive | 2001

Shield or ring surrounding semiconductor workpiece in plasma chamber

Kuang-Han Ke; Bryan Pu; Hongching Shan; James C. Wang; Henry Fong; Zongyu Li; Michael Welch


Archive | 1995

Method and apparatus for producing plasma uniformity in a magnetic field-enhanced plasma reactor

Bryan Pu; Hongching Shan


Archive | 1997

Distributed microwave plasma reactor for semiconductor processing

Hongching Shan; Harald Herchen; Michael Welch

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