Hung-Wei Chiu

A 2.17-dB NF 5-GHz-band monolithic CMOS LNA with 10-mW DC power consumption

The state-of-the-art noise figures of 2.17 dB and 3.0 dB at 5 GHz band from monolithic CMOS LNAs with 10 mW dissipation on thin (/spl sim/ 20 /spl mu/m) and normal (750 /spl mu/m) substrates are presented. Excellent Input return loss (S/sub 11/) of -45 dB, high P/sub 1dB/ of -8.3 dBm and large IIP3 of 0.3 dBm were also obtained. The excellent performance of the LNAs is attributed to the methodology we developed.

Micromachined CMOS LNA and VCO by CMOS-compatible ICP deep trench technology

Selective removal of the silicon underneath the inductors in RF integrated circuits based on inductively coupled plasma (ICP) deep trench technology is demonstrated by a complementary metal-oxide-semiconductor (CMOS) 5-GHz low-noise amplifier (LNA) and a 4-GHz voltage-controlled oscillator (VCO). Design principles of a multistandard LNA with flat and low noise figures (NFs) within a specific frequency range are also presented. A 2-dB increase in peak gain (from 21 to 23 dB) and a 0.5-dB (from 2.28 to 1.78 dB) decrease in minimum NF are achieved in the LNA while a 3-dB suppression of phase noise is obtained in the VCO after the ICP backside dry etching. These results show that the CMOS-process-compatible backside ICP etching technique is very promising for system-on-a-chip applications.

Pain Control on Demand Based on Pulsed Radio-Frequency Stimulation of the Dorsal Root Ganglion Using a Batteryless Implantable CMOS SoC

This paper presents the implementation of a batteryless CMOS SoC with low voltage pulsed radio-frequency (PRF) stimulation. This implantable SoC uses 402 MHz command signals following the medical implanted communication system (MICS) standard and a low frequency (1 MHz) for RF power transmission. A body floating type rectifier achieves 84% voltage conversion ratio. A bi-phasic pulse train of 1.4 V and 500 kHz is delivered by a PRF driver circuit. The PRF parameters include pulse duration, pulse frequency and repetition rate, which are controllable via 402 MHz RF receiver. The minimal required 3 V RF Vin and 2.2 V VDDr is achieved at 18 mm gap. The SoC chip is fabricated in a 0.35 μm CMOS process and mounted on a PCB with a flexible spiral antenna. The packaged PRF SoC was implanted into rats for the animal study. Von Frey was applied to test the mechanical allodynia in a blinded manner. This work has successfully demonstrated that implanted CMOS SoC stimulating DRG with 1.4 V, 500 kHz PRF could significantly reduce spinal nerve ligation (SNL) induced mechanical allodynia for 3-7 days.Although pain is interpreted as the fifth vital sign by many professions, the presence of different degrees of pain significantly affects quality of life for many patients, especially the elderly [1]. Electrical stimulation to the central or peripheral neural conduction paths has been utilized in clinics to achieve effective pain relief [2]. The conventional scheme for pulsed radio-frequency (PRF) pain therapy uses thermal coagulation to permanently damage nerves by heat. This destructive method can cause severe side-effects such as hyper-sensitivity to pain after nerves regenerate. Thus, repeated surgery is needed. Additionally, the conventional design of an implantable system requires a battery for operation, often accounting for over 2/3 of the entire device volume. Therefore, a non-destructive and batteryless method using PRF for pain control is key for implantable systems. This work uses a batteryless implantable pain-control SoC that is effective in pain reduction, using a low stimulation voltage that avoids causing thermal damage to dorsal root ganglion (DRG) tissue. An animal study of neuropathic pain was previously designed with PRF parameters to control tissue temperature at ≪40°C via an external function generator [3]. This work now presents the implementation of this functionality on a CMOS SoC. Its effectiveness is demonstrated by observing the behavior of rats receiving localized bipolar stimulus to the DRG of the lumbar nerve.

A low-power low-phase-noise LC VCO with MEMS Cu inductors

A 2-3 GHz CMOS inductance-capacitance (LC) voltage-controlled oscillator (VCO) integrated with high-Q micro-electromechanical systems (MEMS) Cu inductors is reported. While dissipating only 6.3 mW, a phase noise of -121 dBc/Hz at 600 kHz offset from 2.78 GHz carrier is achieved. This MEMS VCO has the largest power-frequency normalized figure-of-merit (12.5 dB) among the Si bipolar and CMOS LC VCOs.

A Battery-Less Tire Pressure Monitoring System

A battery-less tire pressure monitoring system is disclosed, which is installed in a tire to monitor the status of the tire, such as the air pressure of the tire. The battery-less TPMS has a tire pressure sensor, and a power generation device, wherein the tire pressure sensor is installed on the fixture in the tire, in order to monitor the status of the tire. Besides, the power generation device of the battery-less TPMS is also installed on the fixture of the tire, and is electrically connected with the tire pressure sensor to provide electrical power for the operation of the tire pressure sensor.

A 5-GHz-Band CMOS Receiver With Low LO Self-Mixing Front End

A 5.0-GHz-band monolithic direct-conversion receiver front end employing subharmonic mixers (SHMs) is demonstrated in 0.18-mum CMOS technology. Instead of using transistors as transconductors, the SHMs adopt on-chip 1:4 transformers to achieve voltage gain, and hence, excellent local-oscillator self-mixing suppression and good linearity can be obtained. Additionally, a CMOS-compatible postprocess is used to selectively remove the silicon substrate underneath the inductors and transformers of the receiver front end. While dissipating 43.9 mW from a 1.8-V supply, the micromachined receiver front end exhibits a voltage gain of 28.0 dB, a noise figure of 9.7 dB, a third-order input intercept point of -7.8 dBm at 5.0 GHz, and an input-referred dc offset of -118.0 dBm. The proposed receiver front end is further integrated with analog baseband circuits, a fractional-N frequency synthesizer, and a serial-to-parallel data converter to accomplish a multioperation-mode receiver.

Pulsed radiofrequency inhibited activation of spinal mitogen-activated protein kinases and ameliorated early neuropathic pain in rats.

Pulsed radiofrequency (PRF) has been widely used to treat chronic pain, but the effectiveness and mechanisms in preventing early neuropathic pain have not been well explored. Even fewer knowledge is available in its impact on glia‐mediated nociceptive sensitization. This study aims to elucidate the modulation of PRF on nerve injury‐induced pain development and activation of spinal mitogen‐activated protein kinases (MAPKs).

Reconfigurable SiGe Low-Noise Amplifiers With Variable Miller Capacitance

A new input matching method making use of shunt-shunt feedback capacitance is introduced. Based on the new input matching method, reconfigurable SiGe low-noise amplifiers (LNAs) by varying shunt-shunt feedback capacitance are proposed. Two approaches are used to vary the shunt-shunt feedback capacitance. One approach is to switch between two different bias currents while the other is to use a series combination of a switch and a capacitor. Miniaturized fully monolithic reconfigurable SiGe LNAs without emitter degenerative inductors were realized by the above two approaches. The reconfigurable SiGe LNA achieved by switching bias currents only occupies a very small area of 355 mumtimes155 mum, excluding measurement pads. This LNA achieves an input return losses (S11) of -27.6 dB, a voltage gain (A v) of 19.8 dB, and a noise figure (NF) of 3.18 dB for 2.4-GHz band when biased at a current of 3.8 mA and can be reconfigured to obtain Av=20.4/20.3 dB, S11=-47.1/-24.6 dB and NF=3.42/3.21 dB for 5.2/5.7-GHz band when bias current is switched to 3 mA. In addition, a 2.4/4.9/5.2/5.7-GHz reconfigurable SiGe LNAs for WLAN applications, whose variable shunt-shunt feedback capacitance is controlled by a switch and a capacitor, was also realized

Pain control on demand based on pulsed radio-frequency stimulation of the dorsal root ganglion using a batteryless implantable CMOS SoC

This paper presents the implementation of a batteryless CMOS SoC with low voltage pulsed radio-frequency (PRF) stimulation. This implantable SoC uses 402 MHz command signals following the medical implanted communication system (MICS) standard and a low frequency (1 MHz) for RF power transmission. A body floating type rectifier achieves 84% voltage conversion ratio. A bi-phasic pulse train of 1.4 V and 500 kHz is delivered by a PRF driver circuit. The PRF parameters include pulse duration, pulse frequency and repetition rate, which are controllable via 402 MHz RF receiver. The minimal required 3 V RF Vin and 2.2 V VDDr is achieved at 18 mm gap. The SoC chip is fabricated in a 0.35 μm CMOS process and mounted on a PCB with a flexible spiral antenna. The packaged PRF SoC was implanted into rats for the animal study. Von Frey was applied to test the mechanical allodynia in a blinded manner. This work has successfully demonstrated that implanted CMOS SoC stimulating DRG with 1.4 V, 500 kHz PRF could significantly reduce spinal nerve ligation (SNL) induced mechanical allodynia for 3-7 days.

The determination of S-parameters from the poles of voltage-gain transfer function for RF IC design

A method for estimating the S-parameters of active circuits using hand analysis is introduced. This method involves the determination of S-parameters from the poles of voltage-gain transfer function. It is found that the information on the frequency responses of input/output return loss, input/output impedance, and reverse isolation is all hidden in the poles or equivalently in the denominator of the voltage-gain transfer function of a circuit system. The method has been applied to three commonly used RF circuit configurations and one fabricated CMOS wide-band amplifier to illustrate the usefulness of the proposed theory.