Shey-Shi Lu

A 2.17-dB NF 5-GHz-band monolithic CMOS LNA with 10-mW DC power consumption

The state-of-the-art noise figures of 2.17 dB and 3.0 dB at 5 GHz band from monolithic CMOS LNAs with 10 mW dissipation on thin (/spl sim/ 20 /spl mu/m) and normal (750 /spl mu/m) substrates are presented. Excellent Input return loss (S/sub 11/) of -45 dB, high P/sub 1dB/ of -8.3 dBm and large IIP3 of 0.3 dBm were also obtained. The excellent performance of the LNAs is attributed to the methodology we developed.

Micromachined CMOS LNA and VCO by CMOS-compatible ICP deep trench technology

Selective removal of the silicon underneath the inductors in RF integrated circuits based on inductively coupled plasma (ICP) deep trench technology is demonstrated by a complementary metal-oxide-semiconductor (CMOS) 5-GHz low-noise amplifier (LNA) and a 4-GHz voltage-controlled oscillator (VCO). Design principles of a multistandard LNA with flat and low noise figures (NFs) within a specific frequency range are also presented. A 2-dB increase in peak gain (from 21 to 23 dB) and a 0.5-dB (from 2.28 to 1.78 dB) decrease in minimum NF are achieved in the LNA while a 3-dB suppression of phase noise is obtained in the VCO after the ICP backside dry etching. These results show that the CMOS-process-compatible backside ICP etching technique is very promising for system-on-a-chip applications.

Analysis and Design of a CMOS UWB LNA With Dual-

A wideband low-noise amplifier (LNA) based on the current-reused cascade configuration is proposed. The wideband input-impedance matching was achieved by taking advantage of the resistive shunt-shunt feedback in conjunction with a parallel LC load to make the input network equivalent to two parallel RLC-branches, i.e., a second-order wideband bandpass filter. Besides, both the inductive series- and shunt-peaking techniques are used for bandwidth extension. Theoretical analysis shows that both the frequency response of input matching and noise figure (NF) can be described by second-order functions with quality factors as parameters. The CMOS ultra-wideband LNA dissipates 10.34-mW power and achieves S 11 below -8.6 dB, S 22 below -10 dB, S 12 below -26 dB, flat S 21 of 12.26 ± 0.63 dB, and flat NF of 4.24 ± 0.5 dB over the 3.1-10.6-GHz band of interest. Besides, good phase linearity property (group-delay variation is only ±22 ps across the whole band) is also achieved. The analytical, simulated, and measured results agree well with one another.

RLC

The first circuit implementation of quantization noise suppression technique for DeltaSigma fractional- N frequency synthesizers using reduced step size of frequency dividers is presented in this paper. This technique is based on a 1/1.5 divider cell which can reduce the step size of the frequency divider to 0.5 and thus the reduced step size suppresses the quantization noise by 6 dB. This frequency synthesizer is intended for a WLAN 802.11a/WiMAX 802.16e transceiver. This chip is implemented in a 0.18-mum CMOS process and the die size is 1.23 mm times 0.83 mm. The power consumption is 47.8 mW. The in-band phase noise of -100 dBc/Hz at 10 kHz offset and out-of-band phase noise of -124 dBc/Hz at 1MHz offset are measured with a loop bandwidth of 200 kHz. The frequency resolution is less than 1 Hz and the lock time is smaller than 10 mus

-Branch Wideband Input Matching Network

A Ga/sub 0.51/In/sub 0.49/P/GaAs heterojunction bipolar transistor (HBT) grown on a

A Quantization Noise Suppression Technique for

A novel theory based on dual-feedback circuit methodology is proposed to explain the kink phenomenon of transistor scattering parameter S/sub 22/. Our results show that the output impedance of all transistors intrinsically shows a series RC circuit at low frequencies and a parallel RC circuit at high frequencies. It is this inherent ambivalent characteristic of the output impedance that causes the appearance of kink phenomenon of S/sub 22/ in a Smith chart. It was found that an increase of transistor transconductance enhances the kink effect while an increase of drain-to-source (or collector-to-emitter) capacitance obscures it. This explains why it is much easier to see the kink phenomenon in bipolar transistors, especially heterojunction bipolar transistors, rather than in field-effect transistors (FETs). It also explains why the kink phenomenon is seen in larger size FETs and not in smaller size FETs. Our model not only can predict the behavior of S/sub 22/, but also calculate all S-parameters accurately. Experimental data of submicrometer gate Si MOSFETs and GaAs FETs are used to verify our theory. A simple method for extracting transistor equivalent-circuit parameters from measured S-parameters is also proposed based on our theory. Compared with traditional Z- or Y-parameter methods, our theory shows another advantage of giving deep insight into the physical meaning of S-parameters.

DeltaSigma

This paper presents a wideband low-noise amplifier (LNA) based on the cascode configuration with resistive feedback. Wideband input-impedance matching was achieved using a shunt-shunt feedback resistor in conjunction with a preceding π -match network, while the wideband gain response was obtained using a post-cascode inductor (LP), which was inserted between the output of the cascoding transistor and the input of the shunt-shunt resistive feedback network to enhance the gain and suppress noise. Theoretical analysis shows that the frequency response of the power gain, as well as the noise figure (NF), can be described by second-order functions with quality factors or damping ratios as parameters. Implemented in 90-nm CMOS technology, the die area of this wideband LNA is only 0.139 mm2 including testing pads. It dissipates 21.6-mW power and achieves S11 below -10 dB, S22 below -10 dB, flat S21 of 9.6 ±1.1 dB, and flat NF of 3.68 ± 0.72 dB over the 1.6-28-GHz band. Besides, excellent input third-order inter-modulation point of +4 dBm is also achieved. The analytical, simulated, and measured results are mutually consistent.

Fractional-

The state-of-the-art noise figures of 2.17 dB and 3.0 dB at 5 GHz band from monolithic CMOS LNAs with 10 mW dissipation on thin (/spl sim/ 20 /spl mu/m) and normal (750 /spl mu/m) substrates are presented. Excellent Input return loss (S/sub 11/) of -45 dB, high P/sub 1dB/ of -8.3 dBm and large IIP3 of 0.3 dBm were also obtained. The excellent performance of the LNAs is attributed to the methodology we developed.

N

In this paper, we demonstrate an SiGe HBT ultra-wideband (UWB) low-noise amplifier (LNA), achieved by a newly proposed methodology, which takes advantage of the Miller effect for UWB input impedance matching and the inductive shunt-shunt feedback technique for bandwidth extension by pole-zero cancellation. The SiGe UWB LNA dissipates 25.8-mW power and achieves S11 below -10 dB for frequencies from 3 to 14 GHz (except for a small range from 10 to 11 GHz, which is below -9 dB), flat S21 of 24.6 plusmn 1.5 dB for frequencies from 3 to 11.6 GHz, noise figure of 2.5 and 5.8 dB at 3 and 10 GHz, respectively, and good phase linearity property (group-delay variation is only plusmn28 ps across the entire band). The measured 1-dB compression point (P1 dB) and input third-order intermodulation point are -25.5 and -17 dBm, respectively, at 5.4 GHz.

Frequency Synthesizers

This paper describes a novel monolithic low voltage (1-V) CMOS RF front-end architecture with an integrated quadrature coupler (QC) and two subharmonic mixers for direct-down conversion. The LC-folded-cascode technique is adopted to achieve low-voltage operation while the subharmonic mixers in conjunction with the QC are used to eliminate LO self-mixing. In addition, the inherent bandpass characteristic of the LC tanks helps suppression of LO leakage at RF port. The circuit was fabricated in a standard 0.18-mum CMOS process for 5-6 GHz applications. At 5.4 GHz, the RF front-end exhibits a voltage gain of 26.2 dB and a noise figure of 5.2 dB while dissipating 45.5 mW from a 1.0-V supply. The achieved input-referred DC-offset due to LO self-mixing is below -110.7 dBm.