Hsiao-Chin Chen

Micromachined CMOS LNA and VCO by CMOS-compatible ICP deep trench technology

Selective removal of the silicon underneath the inductors in RF integrated circuits based on inductively coupled plasma (ICP) deep trench technology is demonstrated by a complementary metal-oxide-semiconductor (CMOS) 5-GHz low-noise amplifier (LNA) and a 4-GHz voltage-controlled oscillator (VCO). Design principles of a multistandard LNA with flat and low noise figures (NFs) within a specific frequency range are also presented. A 2-dB increase in peak gain (from 21 to 23 dB) and a 0.5-dB (from 2.28 to 1.78 dB) decrease in minimum NF are achieved in the LNA while a 3-dB suppression of phase noise is obtained in the VCO after the ICP backside dry etching. These results show that the CMOS-process-compatible backside ICP etching technique is very promising for system-on-a-chip applications.

3–10-GHz Ultra-Wideband Low-Noise Amplifier Utilizing Miller Effect and Inductive Shunt–Shunt Feedback Technique

In this paper, we demonstrate an SiGe HBT ultra-wideband (UWB) low-noise amplifier (LNA), achieved by a newly proposed methodology, which takes advantage of the Miller effect for UWB input impedance matching and the inductive shunt-shunt feedback technique for bandwidth extension by pole-zero cancellation. The SiGe UWB LNA dissipates 25.8-mW power and achieves S11 below -10 dB for frequencies from 3 to 14 GHz (except for a small range from 10 to 11 GHz, which is below -9 dB), flat S21 of 24.6 plusmn 1.5 dB for frequencies from 3 to 11.6 GHz, noise figure of 2.5 and 5.8 dB at 3 and 10 GHz, respectively, and good phase linearity property (group-delay variation is only plusmn28 ps across the entire band). The measured 1-dB compression point (P1 dB) and input third-order intermodulation point are -25.5 and -17 dBm, respectively, at 5.4 GHz.

A 5–6 GHz 1-V CMOS Direct-Conversion Receiver With an Integrated Quadrature Coupler

This paper describes a novel monolithic low voltage (1-V) CMOS RF front-end architecture with an integrated quadrature coupler (QC) and two subharmonic mixers for direct-down conversion. The LC-folded-cascode technique is adopted to achieve low-voltage operation while the subharmonic mixers in conjunction with the QC are used to eliminate LO self-mixing. In addition, the inherent bandpass characteristic of the LC tanks helps suppression of LO leakage at RF port. The circuit was fabricated in a standard 0.18-mum CMOS process for 5-6 GHz applications. At 5.4 GHz, the RF front-end exhibits a voltage gain of 26.2 dB and a noise figure of 5.2 dB while dissipating 45.5 mW from a 1.0-V supply. The achieved input-referred DC-offset due to LO self-mixing is below -110.7 dBm.

A 0.5-V Biomedical System-on-a-Chip for Intrabody Communication System

A low-voltage (0.5 V) and low-power (4.535 mW) monolithic biomedical system-on-a-chip (SOC) consisting of a receiver, a transmitter, a microcontrol unit, and an analog-to-digital converter (ADC), implemented in a 0.18-μm CMOS technology for intrabody communication is first reported. The SOC can take command through a human body and activate (or turn on) the ADC and transmitter inside the SOC. Then, a biomedical signal is converted to digital format and transmitted to the RF gateway through a human body. With this transmission methodology and the proposed SOC circuit, it is much more power efficient than wireless communication. Moreover, since no antenna is required, the chip size of the SOC is only 1.5 mm2, excluding the test pads.

A monolithic 5.9-GHz CMOS I/Q direct-down converter utilizing a quadrature coupler and transformer-coupled subharmonic mixers

We report the first monolithic 5.9-GHz CMOS I/Q direct-down converter by using a quadrature coupler and transformer-coupled subharmonic mixers (SHMs). Consuming 3.5mW, each SHM achieves a voltage gain of 10.8dB, 7.9-dBm IIP3, and 54-dBm IIP2. The input-referred dc-offset due to local oscillator self-mixing is -80.9dBm.

A Wireless Bio-MEMS Sensor for C-Reactive Protein Detection Based on Nanomechanics

A quick (<30min.), label-free detection of disease-related C-reactive proteins (CRP) is achieved using a 200mum MEMS microcantilever housed in a 7times7mm2 reaction chamber. The deflection of the cantilever due to specific CRP/anti-CRP binding is detected using a position-sensitive photodiode and the converted bio-signal is transmitted by a wireless ASK transceiver IC fabricated in a 0.18mum CMOS process. CRP concentrations from 1mug/mL to 500mug/mL can be detected. A 0.2Hz 1V ac signal is applied to the bio-MEMS sensor to unbind CRP from the cantilever for reuse

A low-power low-phase-noise LC VCO with MEMS Cu inductors

A 2-3 GHz CMOS inductance-capacitance (LC) voltage-controlled oscillator (VCO) integrated with high-Q micro-electromechanical systems (MEMS) Cu inductors is reported. While dissipating only 6.3 mW, a phase noise of -121 dBc/Hz at 600 kHz offset from 2.78 GHz carrier is achieved. This MEMS VCO has the largest power-frequency normalized figure-of-merit (12.5 dB) among the Si bipolar and CMOS LC VCOs.

A 5-GHz-Band CMOS Receiver With Low LO Self-Mixing Front End

A 5.0-GHz-band monolithic direct-conversion receiver front end employing subharmonic mixers (SHMs) is demonstrated in 0.18-mum CMOS technology. Instead of using transistors as transconductors, the SHMs adopt on-chip 1:4 transformers to achieve voltage gain, and hence, excellent local-oscillator self-mixing suppression and good linearity can be obtained. Additionally, a CMOS-compatible postprocess is used to selectively remove the silicon substrate underneath the inductors and transformers of the receiver front end. While dissipating 43.9 mW from a 1.8-V supply, the micromachined receiver front end exhibits a voltage gain of 28.0 dB, a noise figure of 9.7 dB, a third-order input intercept point of -7.8 dBm at 5.0 GHz, and an input-referred dc offset of -118.0 dBm. The proposed receiver front end is further integrated with analog baseband circuits, a fractional-N frequency synthesizer, and a serial-to-parallel data converter to accomplish a multioperation-mode receiver.

Batteryless Transceiver Prototype for Medical Implant in 0.18-

A medical implant communication service/industrial-scientific-medical band batteryless transceiver prototype for medical implants is proposed and implemented using 0.18-μm CMOS technology. An RF-dc converter is used to accomplish the batteryless function of the transceiver, where the RF powering source is also the reference signal source for the frequency synthesizer. MOS-bipolar devices are employed in receiver analog band circuits as pseudo-resistors. Dissipating 2.19 mW in the receive mode, the transceiver achieves a sensitivity from -68 to -73 dBm for a BER <; 10-3, at a data rate of 20 kb/s. An injection-locked technique is used to reduce the carrier phase noise. Dissipating 3.32 mW in the transmitter mode, the transceiver delivers an output power of -20.9--17 dBm over the band of interest and the carrier presents an in-band phase noise of -108.0--114.3 dBc/Hz at an offset frequency of 300 kHz.

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A 5.8 GHz transmitter front-end comprising a quadrature modulator, a variable gain amplifier and an on-chip output balun in CMOS 0.18-/spl mu/m technology is presented. The quadrature modulator adopts cross-coupled type micro-mixer, and the measured 3rd-order rejection is 32 dB under input voltage swing of 250 mVpp. With four-bit control words, a 16-step linear-in-dB output power is realized to achieve a dynamic range of 27 dB. A single-ended type output is accomplished by an on-chip 3:1 transformer and the output matching network is therefore simplified.