Hussein Ballan

Design and optimization of high voltage analog and digital circuits built in a standard 5 V CMOS technology

This paper presents a new family of high-voltage (HV) analog and digital circuits which are fully compatible with a standard 5 V CMOS technology, without any process change. On the basis of several circuits, it is shown that HV design can be classified in three categories, for which a common design methodology can be identified. Detailed circuit sizing as well as measurements illustrate the performance achieved with this technique.<<ETX>>

A SOI CMOS Hall effect sensor architecture for high temperature applications (up to 300/spl deg/C)

The design of a 5 V fully integrated magnetic sensor able to operate up to 270/spl deg/C is presented. Fabricated in a Partially Depleted (PD) 1 /spl mu/m SOI process, this monolithic sensor comprises a resistive Hall plate, an amplifier stage and an A/D converter delivering a temperature stabilized 8-bit digital readout of the magnetic field. This circuit uses analog techniques for continuous compensation of temperature. Design issues inherent to partially depleted SOI, as well as constraints due to high temperature, are discussed.

SOI Hall effect sensor operating up to 270/spl deg/C

The design of a 5 Volts fully integrated magnetic sensor able to operate up to 270/spl deg/C is presented. Fabricated in a Partially Depleted (PD) 1 /spl mu/m SOI process, this monolithic sensor comprises a resistive Hall plate, an amplifier stage and an A/D converter delivering a temperature stabilized 8-bit digital readout of the magnetic field. This circuit uses analog techniques for continuous compensation of temperature. Design issues inherent to partially depleted SOI, as well as constraints due to high temperature, are discussed.

High-Voltage Analog and Digital Output Interfaces

The second part of this book describes the design of high-voltage integrated circuits. One of the most common solutions for high-voltage applications using the SVX devices, involves complex low-voltage signal processing communicating with an external high-voltage environment. This communication is usually performed by high-voltage digital or analog output interfaces. These are discussed in this chapter, where circuit design techniques overcoming the voltage limitations of the devices are presented as well.

MOSFET High-Voltage Technologies

The existing solutions avoiding the different undesirable effects presented in the previous chapter are discussed here. These solutions are distinguished first at a device level where the isolated vertical and lateral DMOSFET structures are presented. Then, the corresponding high-voltage technologies are discussed according to the isolation technique used between devices. A rough presentation of the high-voltage technologies based on the p-n junction isolation and the dielectric isolation techniques is performed. The former are more commonly known as BCD (Bipolar CMOS and DMOS) technologies and start with a bipolar basis. The latter require tricky mechanical processing of the starting material. Interest is focused on the high-voltage technologies using a CMOS basis, where the required supplementary masks and processing steps are added to implement the high-voltage devices.

Supply Voltage Limits in Standard CMOS Technologies

Various undesirable effects can take place in a low-voltage transistor if one of its terminals is pushed beyond the voltage limit set by the technology. The scope of this chapter is the investigation and modelling of these effects. A particular interest is first focused on the degradation of the device characteristics resulting from channel hot-carrier effects. Then, destructive mechanisms such as, avalanche breakdown. surface breakdown, snapback breakdown, punchthrough breakdown and gate oxide breakdown are analysed. These theoretical considerations are the basics required to implement the design of reliable high-voltage devices.

Measurement and Modelling of the High-Voltage Devices

The measured static and dynamic characteristics of the SVX devices are presented first, where the high-voltage capabilities and the reliability aspects are pointed out through the measurement data. On the basis of these results, a first order modelling is then performed for both devices in order to allow further the simulation of high-voltage integrated circuits. It consists of two macro-models in which discrete devices are combined with a low-voltage transistor to model the behaviour of the lightly doped drains. Finally, the handling of high-voltage power supplies in a standard low-voltage CMOS process, necessitates the use of special layout precautions against parasitic effects. These precautions are discussed in the last part of this chapter.

12V Delta-Sigma Class-D Audio Amplifier

Among the various existing medium- and low-power system applications, where a full high-voltage integrated circuit solution can be used, there is a limit beyond which the SVX technique loses its advantages with respect to dedicated technologies. The class-D audio amplifier presented in this chapter is a typical medium power application suited for this purpose. In addition to the power limit considerations, this chapter points Out the flexibility of this approach in combining low-voltage signal processing and high-voltage features. In fact, the low-voltage part of the amplifier consists of a delta-sigma (Δ-Σ) modulator and some protection features,.such as over-temperature and over-current detection cells.

Design of High-Voltage Devices Using the SVX Technique

A new high-voltage approach using a CMOS basis to extend the operating voltage without requiring any modification of the process steps is detailed in this chapter. It is the technological basis of this book, and will be called Smart Voltage eXtension (SVX). In order to carry out the design of the complementary high-voltage devices, the possibilities of implementing such devices by the use of existing technological layers are examined, and the main processing steps are presented. Two dimensional computer simulations are also performed to optimise the scaling of the high-voltage parameters, and to consider the reliability aspects.

12 V /spl Sigma/-/spl Delta/ class-D amplifier in 5 V CMOS technology

A 12 V, 5.7 W class-D single chip amplifier, based on a /spl Sigma/-/spl Delta/ modulator and a full-bridge output, has been integrated in a standard 5 V CMOS technology. Circuit techniques are used to cope with the voltage limitations of the devices. Stand-by power dissipation is reduced to 20 mW thanks to a new level-shifter cell.