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Featured researches published by Hyoji Choi.


IEEE Electron Device Letters | 2013

p-GaN Gate HEMTs With Tungsten Gate Metal for High Threshold Voltage and Low Gate Current

In-jun Hwang; Jongseob Kim; Hyuk Soon Choi; Hyoji Choi; Jae-won Lee; Kyung Yeon Kim; Jong-Bong Park; Jae Cheol Lee; Jong-Bong Ha; Jae-joon Oh; Jai-Kwang Shin; U-In Chung

The impact of gate metals on the threshold voltage (VTH) and the gate current of p-GaN gate high-electron-mobility transistors (HEMTs) is investigated by fabricating p-GaN gate HEMTs with different work function gate metals-Ni and W. p-GaN gate HEMTs incorporate a p-GaN layer under the gate electrode as the gate stack on top of the AlGaN/GaN layer. In comparison to the Ni-gate p-GaN HEMTs, the W-gate p-GaN HEMTs showed a higher VTH of 3.0 V and a lower gate current of 0.02 mA/mm at a gate bias of 10 V. Based on TCAD device simulations, we revealed that these high VTH and low gate current are attributed to the low gate metal work function and the high Schottky barrier between the p-GaN and the W gate metal.


Proceedings of SPIE | 2012

Highly efficient InGaN/GaN blue LED on 8-inch Si (111) substrate

Jun-Youn Kim; Young-jo Tak; Jae-Kyun Kim; Hyun-gi Hong; Su-hee Chae; Jae-won Lee; Hyoji Choi; Young-soo Park; U-In Chung; Jong-Ryeol Kim; Jong-In Shim

We have grown LED structures on top of a robust n-type GaN template on 8-inch diameter silicon substrates achieving both a low dislocation density and a 7 um-thick template without crack even at a sufficient Si doping condition. Such high crystalline quality of n-GaN templates on Si were obtained by optimizing combination of stress compensation layers and dislocation reduction layers. Wafer bowing of LED structures were well controlled and measured below 20 μm and the warpage of LED on Si substrate was found to strongly depend on initial bowing of 8-inch Si substrates. The full-width at half-maximum (FWHM) values of GaN (0002) and (10-12) ω-rocking curves of LED samples grown on 8-inch Si substrates were 220 and 320 arcsec. The difference between minimum and maximum of FWHM GaN (0002) was 40 arcsec. The dislocation densities were measured about 2~3×108/cm2 by atomic force microscopy (AFM) after in-situ SiH4 and NH3 treatment. The measured quasi internal quantum efficiency of 8-inch InGaN/GaN LED was ~ 90 % with excitation power and temperature-dependent photoluminescence method. Under the un-encapsulated measurement condition of vertical InGaN/GaN LED grown on 8-inch Si substrate, the overall output power of the 1.4×1.4 mm2 chips representing a median performance exceeded 484 mW with the forward voltage of 3.2 V at the driving current of 350 mA.


international electron devices meeting | 2012

Characterization of traps and trap-related effects in recessed-gate normally-off AlGaN/GaN-based MOSHEMT

Jong-Ho Bae; In-jun Hwang; Jongmin Shin; Hyuck-In Kwon; Chan Hyeong Park; Jong-Bong Ha; Jae-won Lee; Hyoji Choi; Jongseob Kim; Jong-Bong Park; Jae-joon Oh; Jai-Kwang Shin; U-In Chung; Jong-Ho Lee

Traps and trap-related effects in recessed-gate normally-off AlGaN/GaN-based MOSHEMT with SiO2 gate dielectric were characterized. Hysteresis in ID-VG was observed at elevated temperature (~120°C) due to the traps. To understand the traps, current transient in drain was investigated at given gate and drain pulses with different temperatures. Two groups of time constants were extracted: one is nearly constant and the other is decreased with temperature. Extracted activation energies from the drain current transients with temperature are 0.66 eV and 0.73 eV, respectively, for given gate and drain pulses. Using extracted exponential trap density profile from frequency dependent conductance method [4], we could understand C-V behavior with frequency. It was shown that traps inside AlGaN layer are a main cause for the decrease of capacitance at high frequency in inversion region. The pulsed I-V characteristics also show frequency dependence.


international symposium on power semiconductor devices and ic's | 2012

1.6kV, 2.9 mΩ cm 2 normally-off p-GaN HEMT device

In-jun Hwang; Hyoji Choi; Jae-won Lee; Hyuk Soon Choi; Jongseob Kim; Jong-Bong Ha; Chang-Yong Um; Sun-Kyu Hwang; Jae-joon Oh; Jun-Youn Kim; Jai Kwang Shin; Young-soo Park; U-In Chung; In-kyeong Yoo; Kinam Kim

A p-GaN/AlGaN/GaN based normally-off HEMT device has been demonstrated on a Si substrate. Our p-GaN based device shows not only a high threshold voltage of 3 V but also low gate leakage current. Buffer and device breakdown voltages exceed 1600 V with 5.2 um GaN buffer thickness and specific on-state resistance is 2.9mΩ cm2. The calculated figure of merit is 921 MV2/Ωcm2, which is the highest value reported for the GaN E-mode devices.


Proceedings of SPIE | 2011

Highly efficient InGaN/GaN blue LEDs on large diameter Si (111) substrates comparable to those on sapphire

Jun-Youn Kim; Yongjo Tak; Hyun-gi Hong; Su-hee Chae; Jae-won Lee; Hyoji Choi; Jae Kyun Kim; Bok-ki Min; Young-soo Park; U-In Chung; Min-Ho Kim; Seongsuk Lee; Nam-Goo Cha; Yoonhee Shin; Cheolsoo Sone; Jong-Ryeol Kim; Jong-In Shim

Highly efficient InGaN/GaN LEDs grown on 4- and 8-inch silicon substrates comparable to those on sapphire substrates have been successfully demonstrated. High crystalline quality of n-GaN templates on Si were obtained by optimizing combination of stress compensation layers and dislocation reduction layers. The full-width at half-maximum (FWHM) values of GaN (0002) and (10-12) ω-rocking curves of n-GaN templates on 4-inch Si substrates were 205 and 290 arcsec and those on 8-inch Si substrate were 220 and 320 arcsec, respectively. The dislocation densities were measured about 2~3×108/cm2 by atomic force microscopy (AFM) after in-situ SiH4 and NH3 treatment. Under the unencapsulated measurement condition of vertical InGaN/GaN LED grown on 4-inch Si substrate, the overall output power of the 1.4×1.4 mm2 chips representing a median performance exceeded 504 mW with the forward voltage of 3.2 V at the driving current of 350 mA. These are the best values among the reported values of blue LEDs grown on Si substrates. The measured internal quantum efficiency was 90 % at injection current of 350 mA. The efficiency droops of vertical LED chips on Si between the maximum efficiency and the efficiency measured at 1A (56.69 A/cm2) input current was 5%.


international symposium on power semiconductor devices and ic's | 2013

High threshold voltage p-GaN gate power devices on 200 mm Si

Jongseob Kim; Sun-Kyu Hwang; In-jun Hwang; Hyoji Choi; Soogine Chong; Hyun-Sik Choi; Woo-Chul Jeon; Hyuk Soon Choi; Jun Yong Kim; Young Hwan Park; Kyung Yeon Kim; Jong-Bong Park; Jong-Bong Ha; Ki Yeol Park; Jae-joon Oh; Jai Kwang Shin; U-In Chung; In-kyeong Yoo; Kinam Kim

In this paper, we present high threshold voltage, low on-resistance, and high speed GaN-HEMT devices using a p-GaN layer in the gate stack. There are three novel features - first, for the first time, p-GaN gate HEMTs were fabricated on a 200-mm GaN on Si substrate using a Au-free fully CMOS-compatible process. Second, good electrical characteristics, including a threshold voltage of higher than 2.8 V, a low gate leakage current, no hysteresis, and fast switching, were obtained by employing a p-GaN and W gate stack. Finally, TO-220 packaged p-GaN gate HEMT devices, which can sustain a gate bias of up to 20 V, were demonstrated. Such properties indicate that our p-GaN HEMT devices are compatible with the conventional gate drivers for Si power devices.


international electron devices meeting | 2014

Highly reliable Cu interconnect strategy for 10nm node logic technology and beyond

R.-H. Kim; Byung-hee Kim; T. Matsuda; Jin-Gyun Kim; Jongmin Baek; Jong Jin Lee; J.O. Cha; J.H. Hwang; S.Y. Yoo; K.-M. Chung; Ki-Kwan Park; J.K. Choi; Eun-Cheol Lee; Sang-don Nam; Y. W. Cho; Hyoji Choi; Ju-Hyung Kim; Soon-Moon Jung; Do-Sun Lee; Insoo Kim; D. Park; Hyae-ryoung Lee; S. H. Ahn; S.H. Park; M.C. Kim; B. U. Yoon; S.S. Paak; N.I. Lee; J.-H. Ku; J-S Yoon

CVD-Ru represents a critically important class of materials for BEOL interconnects that provides Cu reflow capability. The results reported here include superior gap-fill performance, a solution for plausible integration issues, and robust EM / TDDB properties of CVD-Ru / Cu reflow scheme, by iterative optimization of process parameters, understanding of associated Cu void generation mechanism, and reliability failure analysis, thereby demonstrating SRAM operation at 10 nm node logic device and suggesting its use for future BEOL interconnect scheme.


conference on lasers and electro-optics | 2011

Highly efficient InGaN/GaN blue LED grown on Si (111) substrate

Jun-Youn Kim; Yongjo Tak; Jae-won Lee; Hyun-gi Hong; Su-hee Chae; Hyoji Choi; Bok-ki Min; Young-soo Park; Min-Ho Kim; Seongsuk Lee; Nam-Goo Cha; Yoonhee Shin; Jong-Ryeol Kim; Jong-In Shim

For the first time, based on the high crystalline quality of n-GaN on Si template, highly efficient InGaN/GaN LEDs grown on 4-inch silicon substrates comparable to those on sapphire substrates have been successfully demonstrated. At driving current of 350 mA, the overall output power of 1×1 mm2 LED chips exceeded 420 mW and forward voltage was 3.2 V under un-encapsulated condition, which is the best value among the reported values of blue LED grown on Si substrates. The internal quantum efficiency of 76% at injection current of 350 mA was measured.


international electron devices meeting | 2013

Analysis of DC/transient current and RTN behaviors related to traps in p-GaN gate HEMT

Jong-Ho Bae; Sun-Kyu Hwang; Jongmin Shin; Hyuck-In Kwon; Chan Hyeong Park; Hyoji Choi; Jong-Bong Park; Jongseob Kim; Jong-Bong Ha; Ki-Yeol Park; Jae-joon Oh; Jai-Kwang Shin; U-In Chung; Kwang-Seok Seo; Jong-Ho Lee

Trap-related transient characteristics and RTN in p-GaN gate HEMT were characterized, for the first time to our knowledge. Current conduction mechanism in DC IG is explained based on proposed model. Hopping conduction mechanism is responsible for IG at VG <; 0. IG at VG > 0 seems to be controlled by thermionic emission and affected by the action of floating-base n(W)-p(p-GaN)-n(AlGaN/GaN) bipolar transistor. Transient current behavior is related to the DC conduction mechanism and could be explained by thermal emission and charge trapping in p-GaN and AlGaN layers. Measured transient behavior of gate capacitance corresponds to that of the transient currents. Hole trapping into the AlGaN layer and existence of percolation path in gate and drain currents are verified by analyzing RTNs in IG and ID. Trap position and activation energy regarding RTN are firstly extracted. RTN time constants are similar to those in IG and ID transient behavior.


Archive | 2013

High electron mobility transistor and method of manufacturing the same

Jun-Youn Kim; Jae-won Lee; Hyoji Choi

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