Iltcho Angelov

A new empirical nonlinear model for HEMT and MESFET devices

A large-signal model for HEMTs and MESFETs, capable of modeling the current-voltage characteristic and its derivatives, including the characteristic transconductance peak, gate-source and gate-drain capacitances, is proposed. Model parameter extraction is straightforward and is demonstrated for different submicron gate-length HEMT devices including different delta -doped pseudomorphic HEMTs on GaAs and lattice matched to InP, and a commercially available MESFET. Measured and modeled DC and S-parameters are compared and found to coincide well. >

Extensions of the Chalmers nonlinear HEMT and MESFET model

The ability to simulate temperature, dispersion, and soft-breakdown effects as well as a new /spl alpha/ dependence was added to the Chalmers nonlinear model for high electron mobility transistor (HEMTs) and metal semiconductor field-effect transistor (MESFETs). DC, pulsed dc, low frequency (10 Hz-10 MHz), RF, and small signal S-parameter measurements (1-18 GHz) have been made on a large number of commercial HEMT and MESFET devices from different manufacturers in the temperature range 17-400 K in order to evaluate the validity of the model extensions.

Cryogenic wide-band ultra-low-noise IF amplifiers operating at ultra-low DC power

This paper describes cryogenic broad-band amplifiers with very low power consumption and very low noise for the 4-8-GHz frequency range. At room temperature, the two-stage InP-based amplifier has a gain of 27 dB and a noise temperature of 31 K with a power consumption of 14.4 mW per stage, including bias circuitry. When cooled to 15 K, an input noise temperature of 1.4 K is obtained at 5.7 mW per stage. At 0.51 mW per stage, the input noise increases to 2.4 K. The noise measurements have been repeated at different laboratories using different methods and are found consistent.

An empirical table-based FET model

A new large signal field effect transistor (FET) model combining empirical and table based models was developed and investigated experimentally. The Chalmers empirical model was used as a spline function for the table based model. Combining models improves accuracy and simplifies and speeds extraction. The procedure can be applied for other types of devices.

Single-Chip 220-GHz Active Heterodyne Receiver and Transmitter MMICs With On-Chip Integrated Antenna

This paper presents the design and characterization of single-chip 220-GHz heterodyne receiver (RX) and transmitter (TX) monolithic microwave integrated circuits (MMICs) with integrated antennas fabricated in 0.1- μm GaAs metamorphic high electron-mobility transistor technology. The MMIC receiver consists of a modified square-slot antenna, a three-stage low-noise amplifier, and a sub-harmonically pumped resistive mixer with on-chip local oscillator frequency multiplication chain. The transmitter chip is the dual of the receiver chip by inverting the direction of the RF amplifier. The chips are mounted on 5-mm silicon lenses in order to interface the antenna to the free space and are packaged into two separate modules.

Large-signal modelling and comparison of AlGaN/GaN HEMTs and SiC MESFETs

The Large Signal (LS) model for GaN and SiC FET devices was developed and evaluated with DC, S, and LS measurements. Special attention was paid to improve the management of harmonics and to provide a more physical treatment of the dispersion. The model was implemented in a commercial CAD tool and exhibits good overall accuracy.

A Wideband and Compact GaN MMIC Doherty Amplifier for Microwave Link Applications

This paper addresses the limitations and difficulties, in terms of DC-current density restrictions, and process limitations, associated with implementing impedance inverters with high characteristic impedance for monolithic microwave integrated circuit (MMIC) Doherty power amplifiers (DPAs). It is theoretically shown that impedance inverters with high characteristic impedance can be realized by utilizing the output capacitance of the active devices, together with a compact Tee-network of transmission lines with feasible linewidths. The utility of the impedance inverter is proven by design and fabrication of a GaN MMIC-DPA for microwave link applications. Continuous wave (CW) measurements demonstrate a maximum output power of 35±0.5dBm over a frequency range of 6.6-8.5 GHz. The power added efficiency (PAE) in 9 dB output power back-off (OPBO) is better than 30% in a frequency range of 6.7-7.8 GHz. Moreover, linearized modulated measurements, employing a 10 MHz 256-QAM signal with 7.8 dB peak to average power ratio (PAPR), demonstrate higher than 35% average PAE, with 27.5 ± 0.2 dBm average output power, and an adjacent channel power ratio (ACPR) less than -45 dBc, across a 6.8-8.5 GHz frequency range. The fabricated chip-size measures 2.1 mm × 1.5mm.

Single-Chip Frequency Multiplier Chains for Millimeter-Wave Signal Generation

Two single-chip frequency multiplier chains targeting 118 and 183 GHz output frequencies are presented. The chips are fabricated in a 0.1 ¿m GaAs metamorphic high electron-mobility transistor process. The D-band frequency doubler chain covers 110 to 130 GHz with peak output power of 5 dBm. The chip requires 2 dBm input power and consumes only 65 mW of dc power. The signal at the fundamental frequency is suppressed more than 25 dB compared to the desired output signal over the band of interest. The G-band frequency sextupler (×6) chain covers 155 to 195 GHz with 0 dBm peak output power and requires 6.5 dBm input power and 92.5 mW dc power. The input signal to the multiplier chain can be reduced to 4 dBm while the output power drops only by 0.5 dB. The unwanted harmonics are suppressed more than 30 dB compared to the desired signal. An additional 183 GHz power amplifier is presented to be used after the ×6 frequency multiplier chain if higher output power is required. The amplifier delivers 5 dBm output power with a small-signal gain of 9 dB from 155 to 195 GHz. The impedance matching networks are realized using coupled transmission lines which is shown to be a scalable and straightforward structure to use in amplifier design. Microstrip transmission lines are used in all the designs.

Theory and Design of Class-J Power Amplifiers With Dynamic Load Modulation

A theory for class-J microwave amplifier operation as a function of drive level and fundamental load impedance is derived. Calculations show that, under appropriate operating conditions, it is sufficient to modulate the transistor load reactance to enable high-efficiency operation (>;70%) over a large output power dynamic range (>;10 dB) with high transistor power utilization. Such dynamic load modulation (DLM) networks are an ideal application of continuously tunable varactor technologies. Multiharmonic load-pull measurements are performed on a GaN HEMT and experimentally verify the theory of operation. A demonstrator amplifier using an SiC varactor technology is then designed and characterized by static measurements. The amplifier has a peak power of 38 dBm at 2.08 GHz and maintains efficiencies above 45% over 8 dB of power dynamic range. An analysis of the load network losses is performed to show the potential of the class-J DLM transmitter concept.

A millimeterwave subharmonically pumped resistive mixer based on a heterostructure field effect transistor technology

A subharmonically pumped resistive mixer (SPRM) working at millimeter waves based on a heterostructure FET (HFET) technology is described. Nonlinear simulations of the mixer were performed and a special dual HFET chip was developed and fabricated for the demonstration of this mixer. Mixer circuits were fabricated and operational characteristics at 40-45 GHz were investigated.<<ETX>>