Rumen Kozhuharov

Highly integrated 60 GHz transmitter and receiver MMICs in a GaAs pHEMT technology

Highly integrated transmitter and receiver MMICs have been designed in a commercial 0.15 /spl mu/m, 88 GHz f/sub T//183 GHz f/sub MAX/ GaAs pHEMT MMIC process and characterized on both chip and system level. These chips show the highest level of integration yet presented in the 60 GHz band and are true multipurpose front-end designs. The system operates with an LO signal in the range 7-8 GHz. This LO signal is multiplied in an integrated multiply-by-eight (X8) LO chain, resulting in an IF center frequency of 2.5 GHz. Although the chips are inherently multipurpose designs, they are especially suitable for high-speed wireless data transmission due to their very broadband IF characteristics. The single-chip transmitter MMIC consists of a balanced resistive mixer with an integrated ultra-wideband IF balun, a three-stage power amplifier, and the X8 LO chain. The X8 is a multifunction design by itself consisting of a quadrupler, a feedback amplifier, a doubler, and a buffer amplifier. The transmitter chip delivers 3.7/spl plusmn/1.5 dBm over the RF frequency range of 54-61 GHz with a peak output power of 5.2 dBm at 57 GHz. The single-chip receiver MMIC contains a three-stage low-noise amplifier, an image reject mixer with an integrated ultra-wideband IF hybrid and the same X8 as used in the transmitter chip. The receiver chip has 7.1/spl plusmn/1.5 dB gain between 55 and 63 GHz, more than 20 dB of image rejection ratio between 59.5 and 64.5 GHz, 10.5 dB of noise figure, and -11 dBm of input-referred third-order intercept point (IIP3).

60 GHz Single-Chip Front-End MMICs and Systems for Multi-Gb/s Wireless Communication

Single-chip 60 GHz transmitter (TX) and receiver (RX) MMICs have been designed and characterized in a 0.15mum (fT~ 120 GHz/f MAX> 200 GHz) GaAs mHEMT MMIC process. This paper describes the second generation of single-chip TX and RX MMICs together with work on packaging (e.g., flip-chip) and system measurements. Compared to the first generation of the designs in a commercial pHEMT technology, the MMICs presented in this paper show the same high level of integration but occupy smaller chip area and have higher gain and output power at only half the DC power consumption. The system operates with a LO signal in the range of 7-8 GHz. This LO signal is multiplied in an integrated multiply-by-eight (X8) LO multiplier chain, resulting in an IF center frequency of 2.5 GHz. Packaging and interconnects are discussed and as an alternative to wire bonding, flip-chip assembly tests are presented and discussed. System measurements are also described where bit error rate (BER) and eye diagrams are measured when the presented TX and RX MMICs transmits and receives a modulated signal. A data rate of 1.5 Gb/s with simple ASK modulation was achieved, restricted by the measurement setup rather than the TX and RX MMICs. These tests indicate that the presented MMICs are especially well suited for transmission and reception of wireless signals at data rates of several Gb/s

Development of 60-GHz front-end circuits for a high-data-rate communication system

Recent results from a Swedish program for development of 60-GHz monolithic microwave integrated circuits (MMICs) for high-data-rate communication links are presented. Front-end circuits such as mixers, amplifiers, frequency multipliers, IF amplifiers with gain control, and voltage-controlled oscillators (VCOs) have been realized utilizing GaAs PHEMT and MHEMT technologies. A newly developed 7.5-GHz coupled Colpitt VCO shows a minimum phase noise of -95 dBc at 100 kHz offset. A second-harmonic 14-GHz VCO shows a minimum phase noise of less than -90 dBc at 100 kHz. A novel balanced 7-28-GHz MMIC frequency quadrupler is described and compared with a single-ended quadrupler at the same input frequencies. To demonstrate its feasibility and potential application, the quadrupler is combined with the Colpitt VCO and the output characteristics of the resulting 30-GHz MMIC source are measured. A three-stage MHEMT wide-band amplifier covering 43-64 GHz with a gain of 24 dB, a minimum noise figure of 2.5 dB, and a passband ripple of 2 dB is also described. In future 60-GHz systems for mass markets where cost is of utmost importance, Si-based technologies, especially CMOS, are highly interesting. Some recent circuit results based on a 90-nm CMOS technology are also reported.

Single-Chip 220-GHz Active Heterodyne Receiver and Transmitter MMICs With On-Chip Integrated Antenna

This paper presents the design and characterization of single-chip 220-GHz heterodyne receiver (RX) and transmitter (TX) monolithic microwave integrated circuits (MMICs) with integrated antennas fabricated in 0.1- μm GaAs metamorphic high electron-mobility transistor technology. The MMIC receiver consists of a modified square-slot antenna, a three-stage low-noise amplifier, and a sub-harmonically pumped resistive mixer with on-chip local oscillator frequency multiplication chain. The transmitter chip is the dual of the receiver chip by inverting the direction of the RF amplifier. The chips are mounted on 5-mm silicon lenses in order to interface the antenna to the free space and are packaged into two separate modules.

Single-Chip Frequency Multiplier Chains for Millimeter-Wave Signal Generation

Two single-chip frequency multiplier chains targeting 118 and 183 GHz output frequencies are presented. The chips are fabricated in a 0.1 ¿m GaAs metamorphic high electron-mobility transistor process. The D-band frequency doubler chain covers 110 to 130 GHz with peak output power of 5 dBm. The chip requires 2 dBm input power and consumes only 65 mW of dc power. The signal at the fundamental frequency is suppressed more than 25 dB compared to the desired output signal over the band of interest. The G-band frequency sextupler (×6) chain covers 155 to 195 GHz with 0 dBm peak output power and requires 6.5 dBm input power and 92.5 mW dc power. The input signal to the multiplier chain can be reduced to 4 dBm while the output power drops only by 0.5 dB. The unwanted harmonics are suppressed more than 30 dB compared to the desired signal. An additional 183 GHz power amplifier is presented to be used after the ×6 frequency multiplier chain if higher output power is required. The amplifier delivers 5 dBm output power with a small-signal gain of 9 dB from 155 to 195 GHz. The impedance matching networks are realized using coupled transmission lines which is shown to be a scalable and straightforward structure to use in amplifier design. Microstrip transmission lines are used in all the designs.

Balanced Colpitt oscillator MMICs designed for ultra-low phase noise

Balanced voltage-controlled oscillator (VCO) monolithic microwave integrated circuits (MMICs) based on a coupled Colpitt topology with a fully integrated tank are presented utilizing SiGe heterojunction bipolar transistor (HBT) and InGaP/GaAs HBT technologies. Minimum phase noise is obtained for all designs by optimization of the tank circuit including the varactor, maximizing the tank amplitude, and designing the VCO for Class C operation. Fundamental and second harmonic VCOs are evaluated. A minimum phase noise of less than -112 dBc at an output power of 5.5 dBm is achieved at 100-kHz carrier offset and 6.4-GHz oscillation frequency for the fundamental InGaP/GaAs HBT VCO. The second harmonic VCO achieves a minimum measured phase noise of -120 dBc at 100 kHz at 13 GHz. To our best knowledge, this is the lowest reported phase noise to date for a varactor-based VCO with a fully integrated tank. The fundamental frequency SiGe HBT oscillator achieves a phase noise of -108 dBc at 100 kHz at 5 GHz. All MMICs are fabricated in commercial foundry MMIC processes.

Single-Chip 60 GHz Transmitter and Receiver MMICs in a GaAs mHEMT Technology

Single-chip 60 GHz transmitter (TX) and receiver (RX) MMICs have been designed and characterized in a 0.15 mum, ~120 GHz fT/> 200 GHz fMAX GaAs mHEMT MMIC process. This paper describes the second generation of single-chip TX and RX MMICs developed in our group. Compared to our first designs in a commercial pHEMT technology, the MMICs presented in this paper show the same high level of integration but occupy smaller chip area and have higher gain and output power at only half of the DC power consumption. The system operates with an LO signal in the range 7-8 GHz. This LO signal is multiplied in an integrated multiply-by-eight (times8) LO chain, resulting in an IF center frequency of 2.5 GHz. The single chip TX MMIC consists of a balanced resistive mixer with an integrated ultra wideband IF balun, a three-stage amplifier and the times8 LO chain. The times8 is a multifunction design by itself consisting of a quadrupler, a feed back amplifier, a doubler, and a buffer amplifier. The TX chip delivers 4.1 plusmn 1.5 dBm over an RF frequency range of 56.5 to 64.5 GHz. The peak output power is 5.6 dBm measured at 60 GHz and the overall TX chip consumes 420 mW of DC power. The single chip RX MMIC contains a three-stage low noise amplifier, an image reject mixer with an integrated ultra wideband IF hybrid and the same times8 as used in the TX chip. The RX chip has more than 10.7 dB gain between 54.5 and 64.5 GHz and more than 13 dB of image rejection ratio between 57.5 and 67.5 GHz with a peak image rejection ratio of 22.5 dB at 64 GHz. The input referred third order intercept point, IIP3 is measured to -10 dBm at 60 GHz and the overall RX chip consumes 450 mW of DC power

MMIC-Based Components for MM-Wave Instrumentation

In this letter, we present results of fully integrated 90-130 GHz receiver based on 100 nm mHEMT technology. The receiver contains a low noise amplifier (LNA), mixer and LO multiplier chain integrated into a single monolithic microwave integrated circuit (MMIC). The circuit is packaged into a waveguide block, characterized and compared to on-wafer measurements. Waveguide to microstrip transitions are used to interface the MMIC to the waveguide. A breakout LNA circuit is also packaged, and its performance is compared to the receiver. The LNA noise was characterized on a wafer and after packaging. The packaged module is measured at both room and cryogenic temperatures, NF of 3.7 dB is measured at 300 K and 0.9 dB at 20 K.

A high spectral purity GaAs PHEMT MMIC balanced frequency quadrupler

The balanced configuration 7-28 GHz frequency quadrupler is described and compared with a single ended quadrupler at the same input frequencies.

Investigation of device low frequency noise in 28 GHz MMIC VCO

This paper reports on the LF noise spectra for 0.2 /spl mu/m gate length GaAs HEMTs based on a combined enhancement/depletion process manufactured by Philips Microwave Limeil ED02AH. The LF noise is used for an extended large signal model of the transistor implemented in a 28 GHz MMIC VCO. Flicker noise and g-r related noise are included in the phase noise simulation and thus the oscillator phase noise calculations, considering the all important LF noise contributions, are taken into account. The results show that the LF noise (1 kHz -100 kHz) being upconverted controls the phase noise performance of AlGaAs-GaAs HEMT oscillators.