Inchae Song

A Small-Area Low-Power Current Readout Circuit Using Two-Stage Conversion Method for 64-Channel CNT Sensor Arrays

In this paper, a small-area and low-power current readout circuit with a novel two-stage conversion method is presented for 64-channel CNT (carbon nanotube) sensor arrays. In the first stage, current of each CNT sensor is amplified by 64 active input current mirrors (AICMs). In the second stage, the amplified current is converted to a voltage level through the shared variable gain amplifier (S-VGA). Then the S-VGA output is digitalized by successive approximation register analog-to-digital converter (SAR-ADC). The proposed readout circuit significantly reduces chip area and power consumption, since VGA is shared over 64 channels and passive elements are used only in S-VGA. Fabricated chip area is 0.173 mm2 in 0.13 μm CMOS technology. Measured power consumption and linearity error are 73.06 μW and 5.3%, respectively, at the input current range of 10 nA-10 μA and conversion rate of 640 samples/s. A prototype real-time CNT sensor system was implemented using the fabricated readout circuit, and successfully detected alcohol reaction.

Effect of split power/ground planes using stitching capacitors on radiated emission

In this paper, the radiated emissions generated by various split power/ground plane structures are studied. The magnetic field and electric field over the designed test pattern are simulated. Each of the results has different field pattern by bandwidth of signal frequency, gap space or gap location of the split ground gap. To reduce the radiated emission, the method for determining the gap space and the gap location are studied based on the return current distributions. Also, the magnetic near-fields are measured by the near field EMI scan over the test board with the different value and location of the stitching capacitors. These results show that the radiated emission on split power/ground structure can be reduced by optimizing its structure. Moreover, the values and locations of the stitching capacitor should be determined to minimize the discontinuity of the return current paths.

One-chip multi-output SMPS using a shared digital controller and a pseudo relaxation oscillating technique

This paper suggests a multi-level and multi-output SMPS based on a shared digital logic controller through separately operating in exclusive time period. The number of output voltages and their levels can be programmably selected for multiple power voltages. The proposed SMPS also shows a novel DPWM generator based on Pseudo Relaxation Oscillating technique. Although the shared architecture can be devised with small area and high efficiency, it has critical drawbacks that real-time control of each DPWM generators are impossible and its output voltage can be unstable. To solve these problems, a real-time current compensation scheme is proposed as a solution. A current consumption of the core block and entire block with four driver buffers was simulated about 4.9mA and 30mA at 10MHz switching frequency and 100MHz core operating frequency. Output voltage ripple is 11 mV at 3.3V output voltage. Over/undershoot voltage was HmV/19mV at 3.3V output voltage. The noise performance was simulated at 800mA @100KHz load regulation. Core circuit can be implemented small size in 700 μm × 800 μm area. For the verification of proposed circuit, the simulations were carried out with Dong-bu Hitek BCD 0.35μm technology.

Small-area low-power heart condition monitoring system using dual-mode SAR-ADC for low-cost wearable healthcare systems

BACKGROUND Heart rate monitoring is useful to detect many cardiovascular diseases. It can be implemented in a small device with low power consumption, and it can exploit low-cost piezoelectric pressure sensors to measure heart rate. However, it is also desirable to transmit heartbeat waveform for emergency treatment, which significantly increases transmission power. OBJECTIVE In this paper, a low-cost wireless heart condition monitoring SoC is proposed. It can monitor and transmit both heart rate and heartbeat waveform, but the hardware is extremely simplified to achieve in a small package. METHODS By slight modification of successive-approximation analog-digital converter, it can count heart rate and read out heartbeat waveform with the same hardware. In the normal mode, only an 8-bit heart rate is transmitted for power reduction. If the heart rate is out of a given range, it goes to the emergency mode and a 10-bit heartbeat waveform is transmitted for fast treatment. RESULTS The fabricated chip size is 1.1 mm2 in 0.11 μ m CMOS technology, including the radio-frequency transmitter. The measured power consumption is 161.8 μ W in normal mode and 507.3 μ W in emergency mode, respectively. CONCLUSION The proposed SoC achieves low-cost, small area, and low-power. It is useful as part of a disposable healthcare system.

A spread spectrum clock generator using discontinuous modulation technique for reduction of time interval errors

In this paper, we propose a novel discontinuous spread spectrum clock generator with a low maximum time interval error (MTIE) and low electromagnetic interference (EMI). The proposed circuitry was fabricated with 0.35μm CMOS process and operated with 3.3V supply voltage at the average center frequency of 100MHz. The measured results showed the MTIE of 11.59ns with the EMI reduction of 14.57dBm.

Spectrum analysis of switched-capacitor mode DPWM generator with Spread-Spectrum Clocking circuit

In this paper, we analyzed a spectrum of the SMPS (Switching Mode Power Supply) which uses DPWM (Digital Pulse Width Modulation) and adopts SSC (Spread Spectrum Clocking) circuit to reduce EMI (Electro-Magnetic Interference) noise. Generally, SSC circuits are used in order to reduce noise peaks by spreading switching frequency spectrum. Such noise peak reduction is verified with a general FFT (Fast Fourier Transform) method through sufficiently long time which includes many switching cycles. However, effects of drastic changes of power supply voltage such as voltage dropping, onetime noise or bounce in power distribution network are apparently not revealed in the spectrum because their effects are averaged down in the general FFT method. These ripples in power distribution become sources of EMI failures. For accurate spectrum analysis in the transition period, FFT should be performed separately with respect to each transient section. Therefore, we carried out short-time Fourier transform (STFT) with respect to several local window sections as well as general Fourier transform with respect to the overall interval. The separated local windows are the overshoot section and the undershoot section.

Analysis of EMI dependence on signal duty and supplied voltage

In this paper, we analyzed EMI dependence on signal duty ratio and power supplied voltage. The EMI levels of the chip-mounted modules were tested and the near-field and far-field emission levels were measured at 800 MHz frequency (the 2nd harmonic of the clock). The relation between EMI levels and line spectra of signals was analyzed for chip design quality, especially including clock generation circuitry and data paths. In addition, voltage-scaling operation and slew rate control operation which affect radiated emission levels, were tested to investigate the effect of duty ratio and slew asymmetry on EMI generation.