J.A. Power

MOSFET statistical parameter extraction using multivariate statistics

A methodology for the generation of MOSFET device model parameter sets which reflect measured device performance variations is described and assessed for its accuracy and suitability in predicting actual circuit variations. The proposed scheme is based on the principal component method of multivariate statistical techniques and utilizes Monte Carlo simulations. Comparisons between the predictions of device and circuit characteristics and measured characteristics over a wafer lot are shown and discussed. It is suggested that the techniques used are most suitable for the prediction of the measured distributions of precision analog circuits rather than large digital circuits where 25 or more circuit simulations may be totally unacceptable because of the amount of CPU time required.<<ETX>>

An approach for relating model parameter variabilities to process fluctuations

A methodology that makes it possible to link circuit simulator model parameter variations and correlations to disturbances in the IC manufacturing process is presented. An example in which the variabilities among a set of 30 correlated empirical MOSFET model parameters from a 2- mu m CMOS process are represented by the variabilities of just six uncorrelated components with the aid of principal component analysis (PCA) and VARIMAX transformations is described. The derived uncorrelated components are interpreted in terms of the probable process input fluctuations causing them. These independent components may then be utilized to form the basis of realistic worst-case design methodologies or more rigorous statistical design techniques.<<ETX>>

An investigation of MOSFET statistical and temperature effects

Methodologies that make possible the prediction of MOSFET device performance variations occurring as a consequence of random statistical process perturbations and changes in operating temperature are presented. Measured parameter distributions and correlations combined with principal component analysis and gradient analysis techniques have been employed to facilitate the accurate prediction of device current and conductance performance distributions. Complete MOSFET parameter sets have also been measured and analyzed over a -50 degrees C to +120 degrees C temperature range. Simple expressions relating certain parameters to operating temperature are utilized to model these variations where appropriate.<<ETX>>

Inclusion of substrate effects in the flyback method for BJT resistance characterisation

In this paper, the effect of the substrate interaction is examined for the R/sub E/ flyback method which is commonly used to measure the emitter resistance of BJT devices. By considering the structure to be a combination of two devices, the measurement conditions can be understood better for different substrate configurations, giving improved confidence in the method.

Worst-case MOSFET parameter extraction for a 2 /spl mu/m CMOS process

This paper will describe the process by which realistic nominal and worst-case DC MOSFET model parameter sets were determined and validated for a 2 /spl mu/m CMOS technology. The steps involved in this task, which will be detailed, ranged from the definition of a suitable circuit simulator model, through the collection of statistical parametric data, to the generation and verification of the worst-case model sets obtained from this data.<<ETX>>

A novel approach to the estimation of confidence limits for BJT model sets using a bootstrap technique

In this paper, a novel method for the estimation of confidence intervals of extracted parameter values is proposed. The technique is based on a bootstrap method which evaluates the error distributions which are associated with parameter extraction techniques. Using this technique, a confidence interval can then be estimated for extracted parameter values. Results are presented for DC, capacitance and high frequency measurements.

Accurate And Efficient Predictions Of Statistical Circuit Performance Spreads

The requirements for ever-decreasing design times and processing costs associated with, for example, ASIC design have meant that ensuring circuit manufacturability must now be considered to be an integral step in the IC design framework. An efficient and accurate methodology for the prediction of essentially unavoidable statistical circuit performance variations, which is suitable for implementation into a circuit simulator, is presented. Most reported statistical design techniques are aimed at digital design applications, so emphasis has been given in this work to predicting the behaviour of analog circuitry which may be critical in some mixedsignal ASIC applications. The statistical design technique implemented employs measured model parameter data on which a principal component analysis is performed. Circuit sensitivity information also contributes to the efficiency of this methodology.

Influence of probing configuration and data set size for bipolar junction capacitance determination

In this paper, the on-wafer measurement of junction depletion capacitance is examined. This work provides an in-depth discussion of possible probing configurations which can be used. It outlines a method to consistently measure the junction capacitances accurately. The results from this method compare favourably with those extracted using S-parameter measurements. Additionally a method is formulated to determine the minimum number of data points required to maintain extraction accuracy.

Improving the accuracy and efficiency of junction capacitance characterization: strategies for probing configuration and data set size

In this paper, the on-wafer measurement of junction depletion capacitance is examined. This work provides an in-depth discussion of possible probing configurations which can be used. It outlines a method to consistently measure the junction capacitances accurately. The results from this method compare favorably with those extracted using S-parameter measurements. Additionally, methods are formulated to reduce the number of data points required for parameter extraction while at the same time maintaining a high model accuracy.

Worst-Case Simulation Using Principal Component Analysis Techniques: An Investigation

Unavoidable statistical perturbations inherent in any IC manufacturing process lead to variations in MOSFET device parameters. Circuit performances, being sensitive to these model parameters, also exhibit statistical spreads. A new methodology by which circuit designers can accurately predict circuit worst-case performance limits prior to circuit fabrication is presented. Measured device parameter spreads, parameter correlations, principal component analysis techniques, and gradient analysis information have been utilised.