J. Sieiro
University of Barcelona
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Publication
Featured researches published by J. Sieiro.
IEEE Transactions on Microwave Theory and Techniques | 2002
J. Sieiro; J. M. Lopez-Villegas; J. Cabanillas; Joan A. Osorio; J. Samitier
A frequency-dependent compact model for inductors in high ohmic substrates, which is based on an energy point-of-view, is developed. This approach enables the description of the most important coupling phenomena that take place inside the device. Magnetically induced losses are quite accurately calculated and coupling between electric and magnetic fields is given by means of a delay constant. The later coupling phenomenon provides a modified procedure for the computation of the fringing capacitance value, when the self-resonance frequency of the inductor is used as a fitting parameter. The model takes into account the width of every metal strip and the pitch between strips. This enables the description of optimized layout inductors. Data from experiments and electromagnetic simulators are presented to test the accuracy of the model.
Progress in Electromagnetics Research-pier | 2012
N. Vidal; Sergio Curto; José Mª Lopez-Villegas; J. Sieiro; Francisco Manuel Ramos
This study quantifles the detuning and impedance mismatch of antennas implanted inside the human body. Maximum frequency shifts caused by variations in the electrical properties of body tissues and difierent anatomical distributions were derived. The results are relevant to the design of implantable antennas. They indicate the bandwidth enhancement and initial tuning necessary for correct functioning. The study was carried out using electromagnetic modeling based on the flnite-difierence time-domain method and high- resolution anatomical models. Four anatomical computer models of two adults and two children were used. The implanted antennas operated in the Medical Implant Communication Service band. The most important detuning and impedance mismatch was found for subcutaneous locations and in areas where a layer of fat tissue was present. The maximum frequency shift towards higher frequencies was 70MHz. The frequency shift did not occur symmetrically around 403MHz, but was shifted towards higher frequencies.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 2014
R. González-Echevarría; R. Castro-López; Elisenda Roca; Francisco V. Fernández; J. Sieiro; N. Vidal; J. M. Lopez-Villegas
In this paper, a new methodology for the automated generation of the optimal performance trade-offs of integrated inductors is presented. The methodology combines a multiobjective optimization algorithm with electromagnetic simulation to get highly accurate results. A set of sized inductors is obtained showing the best performance trade-offs for a given technology. Unlike reported approaches for inductor synthesis, performance trade-offs are generated offline, i.e., before any specific inductance or quality factor are required. The tight efficiency versus accuracy trade-off of existing approaches is, in this way, avoided and performance evaluation via electromagnetic simulation becomes affordable.
Progress in Electromagnetics Research-pier | 2012
Tomás Carrasco; J. Sieiro; J. M. Lopez-Villegas; N. Vidal; R. González-Echevarría; Elisenda Roca
From the point of view of mixed-mode scattering parameters, Smm, a two-port device can be excited using difierent driving conditions. Each condition leads to a particular set of input re∞ection and input impedance coe-cient deflnitions that should be carefully applied depending on the type of excitation and symmetry of the two-port device. Therefore, the aim of this paper is to explain the general analytic procedure for the evaluation of such re∞ection and impedance coe-cients in terms of mixed-mode scattering parameters. Moreover, the driving of a two-port device as a one-port device is explained as a particular case of a two-port mixed-mode excitation using a given set of mixed-mode loads. The theory is applied to the evaluation of the quality factor, Q, of symmetrical and non- symmetrical inductors.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 2017
R. González-Echevarría; Elisenda Roca; R. Castro-López; Francisco V. Fernández; J. Sieiro; J. M. Lopez-Villegas; N. Vidal
A new design methodology for radiofrequency circuits is presented that includes electromagnetic (EM) simulation of the inductors into the optimization flow. This is achieved by previously generating the Pareto-optimal front (POF) of the inductors using EM simulation. Inductors are selected from the Pareto front and their S-parameter matrix is included in the circuit netlist that is simulated using an RF simulator. Generating the EM-simulated POF of inductors is computationally expensive, but once generated, it can be used for any circuit design. The methodology is illustrated both for a singleobjective and a multiobjective optimization of a low noise amplifier.
Journal of Instrumentation | 2012
Andreu Sanuy; D. Gascon; J. M. Paredes; L. Garrido; M. Ribó; J. Sieiro
A wideband current mode preamplifier with 16 bits dynamic range (DR) is presented. It has been designed for the cameras of the Cherenkov Telescope Array (CTA). A novel current division scheme at the very front end part of the circuit splits the input current into two scaled currents which are connected to independent current mirrors. The mirror of the high gain path comprises a saturation control circuit for accurate current division. Measurement results of an ASIC designed in Austriamicrosystems 0.35 μm SiGe technology are presented: 500 MHz BW, 16 bits DR, 10 pA/sqrt(Hz) input referred noise current and relative linearity error below 3%.
2010 XIth International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design (SM2ACD) | 2010
Carlos Sánchez-López; R. Castro-López; Elisenda Roca; Francisco V. Fernández; R. González-Echevarría; J. Esteban-Muller; J. M. Lopez-Villegas; J. Sieiro; N. Vidal
A systematic design methodology for low-noise amplifiers (LNAs) is introduced. This methodology follows a bottom-up approach that employs a multi-objective evolutionary optimization algorithm, which is used at two levels. First, it is used to generate Pareto-based performance models for integrated planar inductors. To do so, an electromagnetic simulator that takes into account the inductors layout, thus providing highly accurate performance evaluations, is coupled to the optimizer. Unlike foundry-provided inductor libraries, these Pareto-based models offer a detailed insight of the trade-offs between inductance, quality factor and area. Afterwards the Pareto-based models for the inductors are used as design variables to generate the LNA Pareto surface, thus providing highly accurate performance trade-offs of the LNA.
IEEE Microwave and Wireless Components Letters | 2005
J. M. Lopez-Villegas; J.G. Macias; Joan A. Osorio; J. Cabanillas; J. Sieiro; J. Samitier; N. Vidal
This work presents an alternative to generate continuous phase shift of sinusoidal signals based on the use of super harmonic injection locked oscillators (ILO). The proposed circuit is a second harmonic ILO with varactor diodes as tuning elements. In the locking state, by changing the varactor bias, a phase shift instead of a frequency shift is observed at the oscillator output. By combining two of these circuits, relative phases up to /spl plusmn/90/spl deg/ could be achieved. Two prototypes of the circuit have been implemented and tested, a hybrid version working in the range of 200-300 MHz and a multichip module (MCM) version covering the 900-1000 MHz band.
2010 XIth International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design (SM2ACD) | 2010
J. Esteban-Muller; R. González-Echevarría; Carlos Sánchez-López; Elisenda Roca; R. Castro-López; Francisco V. Fernández; J. M. Lopez-Villegas; J. Sieiro; N. Vidal
Inductors play an essential role in the design of RF circuits. The parasitic effects plaguing integrated planar inductors require an accurate modeling and the careful exploration of their performance trade-offs. In this paper, a multi-objective performance modeling technique of planar inductors is presented, that supports both top-down and bottom-up design of RF circuits.
international microwave symposium | 2003
J. M. Lopez-Villegas; J.G. Macias; J. Cabanillas; J. Sieiro; Joan A. Osorio; J. Samitier; J. Bausells; Josep M. Montserrat; E. Cabruja
This work presents a new circuit for the conversion of Binary Phase Shift Keying signals (BPSK) into Amplitude Shift Keying signals (ASK). The basic principles of the conversion method are the super harmonic injection of oscillator circuits and interference phenomena. The first one is used to synchronize the oscillators while the second is used to generate an amplitude interference pattern that reproduces the original phase modulation. When combined with an envelope detector, the proposed circuit allows the coherent demodulation of BPSK signals without the need of a carrier recovery system. Two prototypes of the converter have been implemented. The first one is a hybrid version working in the 300-400 MHz frequency range. The second has been implemented using Multi Chip Module (MCM) technology, and is intended for working in the range of 1.8-2.0 GHz. The time response of the converter to phase changes of the input signal is about 100 ns for the hybrid version and scales down to about 15 ns for the MCM version, giving upper limits for the modulation rate of about 5 Mbit/s and 30 Mbit/s, respectively.This work presents a new circuit for the conversion of Binary Phase Shift Keying signals (BPSK) into Amplitude Shift Keying signals (ASK). The basic principles of the conversion method are the super harmonic injection of oscillator circuits and interference phenomena. The first one is used to synchronize the oscillators while the second is used to generate an amplitude interference pattern that reproduces the original phase modulation. When combined with an envelope detector, the proposed circuit allows the coherent demodulation of BPSK signals without need of carrier recovery system. Two prototypes of the converter have been implemented. The first one is a hybrid version working in the 300-400 MHz frequency range. The second has been implemented using Multi Chip Module (MCM) technology, and is intended for working in the range of 1.8-2.0 GHz. The time response of the converter to phase changes of the input signal is about 100 ns for the hybrid version and scales down to about 15 ns for the MCM version, giving upper limits for the modulation rate of about 5 Mbits/s and 30 Mbits/s, respectively.